Quartus II / ss_quartussevswe
.pdfAltera Quartus II software v9.1 —
Subscription Edition vs. Web Edition
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Features |
Web Edition software |
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Subscription Edition software |
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Getting started |
Download (www.altera.com/download) and DVD (www.altera.com/dvdrequest) |
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General |
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Windows: Vista (32/64 bit), XP (32/64 bit) |
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information |
Operating system support |
Windows: Vista (32 bit), XP (32 bit) |
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Linux: SUSE Linux Enterprise 9 and 10 (32/64 bit), |
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Red Hat Enterprise Linux 4 and 5 (32/64 bit) |
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CentOS 4 and 5 (32/64 bit) |
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CPLD |
MAX® series devices: All |
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MAX series devices: All |
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Low-cost FPGAs |
Cyclone® series devices: All |
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Cyclone series devices: All |
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Midrange FPGAs |
Arria® GX FPGAs: All |
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Arria GX FPGAs: All |
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Device |
Arria II GX FPGAs: EP2AGX45, EP2AGX65 |
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Arria II GX FPGAs: All |
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Stratix® IV / IV GX FPGAs: None |
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Stratix IV/ IV GX/IV GT FPGAs: All |
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support |
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High-end FPGAs |
Stratix III FPGAs: EP3SE50, EP3SL70, EP3SL50 |
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Stratix III FPGAs: All |
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Stratix II / II GX FPGAs: EP2S15, EP2SGX30 |
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Stratix II / II GX FPGAs: All |
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Stratix FPGAs: EP1S10 |
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Stratix / GX FPGAs: All |
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ASIC |
No |
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HardCopy® series: All |
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Altera and partner IP |
Yes, including free OpenCore Plus evaluation feature |
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IP |
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DSP: FIR, FFT, and NCO compilers; Interfaces: |
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Full license IP base suite |
IP available for purchase |
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SerialLite II; |
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Memory controllers: DDR1/2/3, QDR II, |
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RLDRAM II |
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Design entry |
SOPC Builder |
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Yes |
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Schematic entry and language support |
Schematic entry, Verilog, VHDL, and SystemVerilog |
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Design |
Tcl scripting , command line support |
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Yes |
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environment |
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Incremental compilation and team-based |
No |
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Yes |
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design |
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LogicLock |
No |
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Yes |
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Multiprocessor support |
No |
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Yes |
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Rapid Recompile |
No |
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Yes |
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Physical synthesis optimizations |
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Yes |
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Design space explorer |
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Yes |
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Implementation |
Chip planner |
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Yes |
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and |
Live I/O checking |
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Yes |
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optimization |
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Timing-driven placement |
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Yes |
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TimeQuest timing analyzer and |
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Yes |
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optimization advisor |
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Synopsys Design Constraint (SDC) format |
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Yes |
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support |
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Early power estimator |
Available to download on www.altera.com for no cost |
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PowerPlay power analysis and |
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Yes |
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optimization |
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SignalTap® II logic analyzer |
Available with TalkBack enabled |
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Yes |
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SignalProbe feature |
Available with TalkBack enabled |
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Yes |
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Verification |
ModelSim®-Altera Starter Edition |
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Included |
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ModelSim - Altera Edition |
Sold as an option for $945 |
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and debug |
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Embedded logic analyzer interface |
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Yes |
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RTL viewer and technology map viewer |
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Yes |
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Pin planner |
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Yes |
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System design |
Nios II Embedded Design Suite |
Free for both versions of Quartus® II software |
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software |
DSP Builder |
Sold as an option for both versions of Quartus II software |
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Third-party |
EDA partners |
Altera offers third-party support for synthesis, functional and timing simulation, static timing analysis, |
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support |
board-level simulation, signal integrity analysis, and formal verification |
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Copyright © 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. ModelSim is a registered trademark of Mentor Graphics Corporation. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, mask work rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for
products or services. January 2009; PDF only |
SA-01010-9.0 |