01.Designing a microprocessor
.pdfChapter 1 − Designing a Microprocessor
Index
A
Abstraction level. See Design abstraction levels.
B
Behavioral level (VHDL), 5
See also Design abstraction levels. .
C
Combinational circuit, 3
Control unit. See Finite state machine.
D
Dataflow level (VHDL), 8
See also Design abstraction levels. Datapath, 2
Design abstraction levels, 5 behavioral level, 5
gate level, 5 register-transfer level, 5
RTL. See Register-transfer level. transistor level, 5
F
Field programmable gate array, 9 Finite state machine, 3
FPGA. See Field programmable gate array. FSM. See Finite state machine.
G
Gate, 3
Gate level, 5, 6
See also Design abstraction levels.
L
Logic gate, 3
Logic symbol, 5
Page 11 of 11
M
Microprocessor, 2
N
Netlist, 9
Next-state logic, 3
See also Finite state machine.
O
Output logic, 3
See also Finite state machine.
R
Register-transfer level, 5
See also Design abstraction levels.
RTL. See Register-transfer level.
S
Sequential circuit, 3
State memory, 3
See also Finite state machine.
Structural level (VHDL), 8
See also Design abstraction levels.
Synthesis, 9
Synthesizer, 9
T
Transistor, 3
Transistor level, 5, 7
See also Design abstraction levels.
V
VHDL, 7 behavioral level, 6 dataflow level, 8 structural level, 9
Microprocessor Design – Principles and Practices with VHDL |
Last updated 7/16/2003 12:23 PM |