Appendix E.Termination of a transistor port with a load
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Radio Frequency Circuit Design. W. Alan Davis, Krishna Agarwal
Copyright 2001 John Wiley & Sons, Inc.
Print ISBN 0-471-35052-4 Electronic ISBN 0-471-20068-9
APPENDIX E
Termination of a Transistor Port
With a Load
In the three-port circuit in Fig. E.1, one of the three ports is terminated with an impedance that has a reflection coefficient relative to the reference impedance
Zref:
r |
Zi Zref |
E.1 |
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Zi C Zref |
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i D |
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In this expression the subscript i represents s, g, or d depending on whether the device connection is common source, gate, or drain terminated with Zs, Zg, or Zd. The incident and scattered waves from the three-port is
b1 |
D S11a1 |
C S12a2 |
C S13a3 |
E.2 |
b2 |
D S21a1 |
C S22a2 |
C S23a3 |
E.3 |
b3 |
D S31a1 |
C S32a2 |
C S33a3 |
E.4 |
When one of the ports is terminated with ri, then the circuit really is a two-port. The scattering parameters for the common source, gate, and drain connection is shown below:
Common source
S11s D S11 |
C |
S12S21 |
E.5 |
1/rs S22 |
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S12s D S13 |
C |
S12S23 |
E.6 |
1/rs S22 |
296
TERMINATION OF A TRANSISTOR PORT WITH A LOAD |
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FIGURE E.1 Three-port with source terminated with rs.
S21s D S31 C
S32S21
1/rs S22
S22s D S33 C
S23S32
1/rs S22
Common gate
S11g D S22 C
S12S21
1/rg S11
S12g D S23 C
S21S13
1/rg S11
S21g D S32 C
S31S12
1/rg S11
S22g D S33 C
S31S13
1/rg S11
Common drain
S11d D S11 C
S13S31
1/rd S33
S12d D S12 C
S13S32
1/rd S33
S21d D S21 C
S23S31
1/rd S33
S22d D S22 C
S23S32
1/rd S33
E.7
E.8
E.9
E.10
E.11
E.12
E.13
E.14
E.15
E.16
298 TERMINATION OF A TRANSISTOR PORT WITH A LOAD
A numerical example illustrates the process. A given transistor with a set of common source S parameters at 2 GHz is given below:
S11 D 0.136 686
S21 D 3.025 66
S12 D 0.085 6 164
S22 D 0.304 6 136
These are then converted to two-port y parameters. These will be called y11, y31, y13, and y33. The indefinite admittance matrix is formed by adding a third row and column such that the sum of each row and the sum of each column is zero. The resulting 3 ð 3 set of y parameters are obtained:
y11 D 9.681 Ð 10 3 7.695 Ð 10 3
y12 D 12.77 Ð 10 3 C 6.776 Ð 10 3
y13 D 3.086 Ð 10 3 C .9194 Ð 10 3
y21 D 104.2 Ð 10 3 C 20.85 Ð 10 3
y22 D 82.89 Ð 10 3 C 14.39 Ð 10 3
y23 D 21.28 Ð 10 3 C 6.452 Ð 10 3
y31 D 113.8 Ð 10 3 C 13.15 Ð 10 3
y32 D 95.65 Ð 10 3 C 7.618 Ð 10 3
y33 D 18.19 Ð 10 3 C 5.533 Ð 10 3
These are then converted to three-port S parameters using Eq. (10.32) [1]:
S11 D 1.6718 6 168.12°
S12 D 1.6573 63.639°
S13 D 1.0103 613.684°
S21 D 3.1794 6 157.77°
S22 D 2.0959 614.185°
S23 D 0.7156 674.511°
S31 D 1.6455 670.181°
S32 D 2.7564 6 167.02°
S33 D 2.1085 6 153.87°
REFERENCES 299
At this point it is desired to transform these parameters to common gate parameters in which the gate is connected to ground through a short circuit. The resulting common gate two-port S parameters are found from Eqs. (E.9) through (E.12):
S11g D 5.317 6170.925°
S21g D 10.772 6 14.852°
S12g D 2.496 6177.466°
S22g D 6.250 6 7.553°
With the transistor now characterized in the orientation that it is to be used in the oscillator, a choice is made for the impedance at the generator side. If this impedance is chosen to be a 5 nH inductor, the output reflection coefficient is
o D 1.7775 6 30.35°
This shows that oscillation is possible under these loading conditions. The expressions given above for the revised S parameters can be found in [2] using slightly different notation.
REFERENCES
1.K. Kurokawa, “Power Waves and the Scattering Matrix,” IEEE Trans. Microwave Theory Tech., pp. 194–202, 1965.
2.R. M. Dougherty, “Feedback Analysis and Design Techniques,” Microwave J., Vol. 28, pp. 133–150, 1985.