ARM PrimeCellTM Synchronous
Static Memory Controller (PL093)
Technical Reference Manual
Copyright © 2001. All rights reserved.
ARM DDI 0236A
ARM PrimeCellTM Synchronous Static Memory Controller (PL093)
Technical Reference Manual
Copyright © 2001. All rights reserved.
Release Information
Change history
Date |
Issue |
Change |
|
|
|
7 December 2001 |
A |
First release |
|
|
|
Proprietary Notice
Words and logos marked with ® or ™ are registered trademarks or trademarks owned by ARM Limited, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners.
Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder.
The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.
This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.
Confidentiality Status
This document is Open Access. This document has no restriction on distribution.
Product Status
The information in this document is final (information on a developed product).
Web Address
http://www.arm.com
ii |
Copyright © 2001. All rights reserved. |
ARM DDI 0236A |
Contents
ARM PrimeCellTM Synchronous Static Memory
Controller (PL093) Technical Reference Manual
Preface
|
|
About this document ...................................................................................... |
x |
|
|
Feedback ..................................................................................................... |
xiii |
Chapter 1 |
Introduction |
|
|
|
1.1 |
About the ARM PrimeCell SSMC (PL093) .................................................. |
1-2 |
|
1.2 |
Supported memory devices ........................................................................ |
1-7 |
Chapter 2 |
Functional Overview |
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|
|
2.1 |
ARM PrimeCell SSMC overview ................................................................. |
2-2 |
|
2.2 |
PrimeCell SSMC operation ......................................................................... |
2-7 |
|
2.3 |
System-on-chip design considerations ..................................................... |
2-39 |
|
2.4 |
Slave interface connection to the AHB ..................................................... |
2-53 |
|
2.5 |
Memory shadowing ................................................................................... |
2-54 |
|
2.6 |
Test interface controller ............................................................................ |
2-57 |
|
2.7 |
Using the SSMC with an EBI .................................................................... |
2-58 |
Chapter 3 |
Programmer’s Model |
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|
|
3.1 |
About the programmer’s model ................................................................... |
3-2 |
|
3.2 |
PrimeCell SSMC registers .......................................................................... |
3-3 |
ARM DDI 0236A |
Copyright © 2001. All rights reserved. |
iii |
Contents
Chapter 4 |
Programmer’s Model for Test |
|
|
|
4.1 |
Scan testing ................................................................................................ |
4-2 |
|
4.2 |
Test registers .............................................................................................. |
4-3 |
Appendix A |
Signal Descriptions |
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|
A.1 |
AMBA AHB interface signals ...................................................................... |
A-2 |
|
A.2 |
AMBA AHB slave interface signals ............................................................. |
A-3 |
|
A.3 |
AMBA AHB master interface signals .......................................................... |
A-5 |
|
A.4 |
Non-AMBA signals ..................................................................................... |
A-7 |
|
A.5 |
Input/output pad signals ............................................................................. |
A-9 |
iv |
Copyright © 2001. All rights reserved. |
ARM DDI 0236A |