- •Contents
- •Preface
- •Related Documents
- •Typographic and Syntax Conventions
- •Creating HDL Modules for CDBA Cellviews
- •Creating HDL Data as You Save CDBA Cellviews
- •Creating HDL Data from Pre-existing CDBA Cellviews
- •Quick-Start Tutorial
- •The Circuit
- •AMS Designer Tools
- •Setting Up the Tutorial
- •Running from a Script
- •Running within the AMS Environment
- •Opening the Command Interpreter Window
- •Netlisting and Compiling
- •Elaborating and Simulating the Design
- •Summary
- •Setting Up the AMS Environment
- •Overview
- •The hdl.var File
- •The ams.env Files
- •AMS Designer Supports Design Management
- •Specifying the Text Editor to Use
- •Specifying Fonts for the Cadence Hierarchy Editor
- •Preparing to Use AMS Designer from the Hierarchy Editor
- •Netlisting
- •Netlisting Modes Supported by the AMS Netlister
- •Automatic Netlisting of a Cellview
- •Netlist Updating and Netlisting of Entire Designs
- •Netlisting from the UNIX Command Line
- •Library Netlisting
- •Netlisting of Cells in Response to Changes in CDF
- •Preparing Existing Analog Primitive Libraries for Netlisting
- •Specifying the Behavior of the Netlister and Compilers
- •Opening the AMS Options Windows
- •Setting Netlister Options from the Hierarchy Editor
- •Opening the CIW AMS Options Window
- •Setting Compiler Options
- •Viewing the AMS Netlister Log
- •Understanding the Output from the AMS Netlister
- •How Inherited Connections Are Netlisted
- •Inherited Signal Connections
- •Inherited Terminal Connections
- •Instance Values for Inherited Connections
- •Third-Party Tools and Other Cadence Tools
- •How Aliased Signals Are Netlisted
- •How m-factors (Multiplicity Factors) Are Netlisted
- •How Iterated Instances Are Netlisted
- •Passing Model Names as Parameters
- •Effect of the modelname, model, and modelName Parameters
- •Handling of the model* and componentName Parameters
- •Precedence of the model* and componentName Parameters
- •Specifying Parameters to be Excluded from Netlisting
- •Ignoring Parameters for Entire Libraries
- •Example: Specifying Parameters to Ignore
- •Ensuring that Floating Point Parameters Netlist Correctly
- •Working with Schematic Designs
- •Setting Schematic Rules Checker Options for AMS Designer
- •Creating Cellviews Using the AMS Environment
- •Preparing a Library
- •Creating the Symbol View
- •Using Blocks
- •Descend Edit
- •Inherited Connections
- •Global Signals in the Schematic Editor
- •Inherited Connections in a Hierarchy
- •How Net Expressions Evaluate
- •Net and Pin Properties
- •groundSensitivity and supplySensitivity Properties
- •Making Connect Modules Sensitive to Inherited Connection Values
- •Using External Text Designs
- •Overview of Steps for Using External Text Designs
- •Bringing Modules into a Cadence Library
- •Specifying the Working Library
- •Compiling into Libraries
- •Compiling into Temporary Libraries
- •Listing Compiled Modules
- •Using Text Blocks in Schematics
- •Using Modules Located in a Cadence Library
- •Preparing for Simulation
- •Using Analog Primitives
- •Using SPICE and Spectre Netlists and Subcircuits
- •Preparing to Use SPICE and Spectre Netlists and Subcircuits
- •Placing SPICE and Spectre Netlists and Subcircuits in a Schematic
- •Using Test Fixtures
- •Creating and Using a Textual Test Fixture
- •Creating a Textual Test Fixture
- •Using a Test Fixture
- •Example: Creating and Using a Test Fixture
- •Using Design Configurations
- •Ensuring HDL Design Unit Information Is Current
- •Preparing a Design for Simulation
- •Overview of AMS Design Prep
- •What AMS Design Prep Does to Prepare a Design for Simulation
- •When to Use AMS Design Prep
- •Specifying the Behavior of AMS Design Prep
- •Setting Options for Global Design Data
- •Specifying Global Signals
- •Specifying Design Variables
- •Specifying Model Files to Use During Elaboration
- •Running AMS Design Prep
- •The cds_globals Module
- •Global Signals
- •Design Variables
- •Setting Elaborator Options
- •Setting Simulator Options
- •Setting Waveform Selection Options
- •Creating Probes
- •Selecting Instances from the Virtuoso Schematic Editing Window
- •Selecting Buses
- •Selecting Instances from the Scope Navigator
- •Copying and Pasting Within Tables
- •Elaborating and Simulating
- •Viewing Messages
- •Plotting Waveforms After Simulation Ends
- •Starting the SimVision Waveform Viewer
- •Plotting Waveforms Selected on a Schematic (Direct Plot)
- •Using the amsdesigner Command
- •Examples
- •Producing Customized Netlists
- •Producing Customized Netlists
- •Identifying the Sections of a Netlist
- •Using ams.env Variables to Customize Netlists
- •Using Netlisting Procedures to Customize Netlists
- •Examples: Problems Addressed by Customized Netlists
- •Example: Adjusting Parameter Values to Account for Number of Fingers
- •Example: Using Symbols that Represent Verilog Test Code
- •Data Objects Supported for Netlisting
- •Netlister Object
- •Formatter Object
- •Cellview Object
- •Parameter Object
- •Instance Object
- •SKILL Functions Supported for Netlisting
- •Default Netlisting Procedures
- •Netlisting Helper Functions
- •Variables for ams.env Files
- •How AMS Designer Determines the Set of Variables
- •Why AMS Designer Uses ams.env Files, Not .cdsenv Files
- •List of ams.env Variables
- •Detailed Descriptions of ams.env Variables
- •aliasInstFormat
- •allowDeviantBuses
- •allowNameCollisions
- •allowSparseBuses
- •allowUndefParams
- •amsCompMode
- •amsDefinitionViews
- •amsEligibleViewTypes
- •amsExcludeParams
- •amsExpScalingFactor
- •amsLSB_MSB
- •amsMaxErrors
- •amsScalarInstances
- •amsVerbose
- •analogControlFile
- •bindCdsAliasLib
- •bindCdsAliasView
- •cdsGlobalsLib
- •cdsGlobalsView
- •checkAndNetlist
- •checkOnly
- •checktasks
- •compileAsAMS
- •compileExcludeLibs
- •compileMode
- •connectRulesCell
- •connectRulesCell2
- •connectRulesLib
- •connectRulesView
- •detailedDisciplineRes
- •discipline
- •excludeViewNames
- •hdlVarFile
- •headerText
- •ieee1364
- •ifdefLanguageExtensions
- •incdir
- •includeFiles
- •includeInstCdfParams
- •initFile
- •instClashFormat
- •iterInstExpFormat
- •language
- •lexpragma
- •logFileAction
- •logFileName
- •macro
- •maxErrors
- •messages
- •modifyParamScope
- •ncelabAccess
- •ncelabAnnoSimtime
- •ncelabArguments
- •ncelabCoverage
- •ncelabDelayMode
- •ncelabDelayType through ncelabMessages
- •ncelabMixEsc
- •ncelabModelFilePaths
- •ncelabNeverwarn through ncelabVipdelay
- •ncsimArguments
- •ncsimEpulseNoMsg through ncsimExtassertmsg
- •ncsimGUI
- •ncsimLoadvpi through ncsimStatus
- •ncsimTcl
- •ncsimUnbuffered through ncsimUseAddArgs
- •ncvhdlArguments
- •ncvlogArguments
- •ncvlogUseAddArgs
- •netClashFormat
- •netlistAfterCdfChange
- •netlistMode
- •netlistUDFAsMacro
- •neverwarn
- •noline
- •nomempack
- •nopragmawarn
- •nostdout
- •nowarn
- •paramDefVals
- •paramGlobalDefVal
- •pragma
- •processViewNames
- •prohibitCompile
- •runNcelab
- •runNcsim
- •scaddlglblopts
- •scaddltranopts
- •scale
- •scalem
- •scannotate
- •scapprox
- •scaudit
- •sccheckstmt
- •sccmin
- •sccompatible
- •scdebug
- •scdiagnose
- •scdigits
- •scerror
- •scerrpreset
- •scfastbreak
- •scgmin
- •scgmincheck
- •schomotopy
- •sciabstol
- •scic
- •scicstmt
- •scignshorts
- •scinfo
- •scinventory
- •sclimit
- •sclteratio
- •scmacromod
- •scmaxiters
- •scmaxnotes
- •scmaxrsd
- •scmaxstep
- •scmaxwarn
- •scmethod
- •scmodelevaltype
- •scmosvres
- •scnarrate
- •scnotation
- •scnote
- •scopptcheck
- •scpivabs
- •scpivotdc
- •scpivrel
- •scquantities
- •screadic
- •screadns
- •screlref
- •screltol
- •scrforce
- •scscale
- •scscalem
- •scscftimestamp
- •scscfusefileflag
- •scskipcount
- •scskipdc
- •scskipstart
- •scskipstop
- •scspeed
- •scstats
- •scstep
- •scstop
- •scstrobedelay
- •scstrobeperiod
- •sctemp
- •sctempeffects
- •sctitle
- •sctnom
- •sctopcheck
- •sctransave
- •scusemodeleval
- •scvabstol
- •scwarn
- •scwrite
- •simRunDirLoc
- •simVisScriptFile
- •status
- •templateFile
- •templateScript
- •timescale
- •update
- •use5xForVHDL
- •useDefparam
- •useNcelabNowarn
- •useNcelabSdfCmdFile
- •useNcsimNowarn
- •useNowarn
- •useScaddlglblopts
- •useScaddltranopts
- •useScic
- •useScreadic
- •useScreadns
- •useScwrite
- •useSimVisScriptFile
- •useProcessViewNamesOnly
- •verboseUpdate
- •vlogGroundSigs
- •vloglinedebug
- •vlogSupply0Sigs
- •vlogSupply1Sigs
- •wfDefaultDatabase
- •wfDefInstCSaveAll
- •wfDefInstCSaveLvl
- •wfDefInstSaveCurrents
- •wfDefInstSaveVoltages
- •wfDefInstVSaveAll
- •wfDefInstVSaveLvl
- •wfDefInstVSaveObjects
- •Updating Legacy SimInfo for Analog Primitives
- •The ams Fields
- •Special Handling of model, modelName, modelname, and componentName
- •Converting an Existing Analog Primitive Library
- •Designing for Virtuoso AMS Compliance
- •Terminals
- •Buses
- •Component Description Format
- •Parameters
- •Using Inherited Parameters
- •Using Cell Parameters
- •Parameterized Cells
- •VHDL-AMS Component Declarations
- •Properties
- •Properties to Avoid Completely
- •Avoid the portOrder Property Unless Required by Special Circumstances
- •Properties to Use Only in AMS Compatibility Mode
- •Properties That Have No Special Meaning in the AMS Environment
- •Properties Fully Supported by the AMS Environment
- •SKILL Functions
- •amsCheckCV
- •amsIsPresent
- •amsNetlist
- •amsProcessCellViews
- •amsUIOptionsForm
- •amsUIRunNetlisterForm
- •ddsCvtAMSTranslateCell
- •ddsCvtAMSTranslateLib
- •ddsCvtToolBoxAMS
- •vmsUpdateCellViews
- •Customization Variables
- •schHdlNotCreateDB
- •schHdlUseVamsForVerilog
- •vmsAnalysisType
- •vmsCreateMissingMasters
- •vmsNcvlogExecutable
- •vmsPortProcessing
- •vmsRunningInUI
- •vmsTemplateScript
- •vmsVerboseMsgLevel
- •Compiling Cadence-Provided Libraries
- •Purpose of the amsLibCompile Tool
- •Running the amsLibCompile Tool Manually
- •Example
Virtuoso AMS Environment User Guide
Variables for ams.env Files
wfDefInstSaveCurrents
Controls whether current probes are created for the objects selected from the schematic or the navigator.
Syntax
amsDirect.prep wfDefInstSaveCurrents boolean t | nil
Values |
|
t |
Places a checkmark next to the Currents at terminals or ports |
|
label in the Waveforms pane of the AMS Options window, |
|
indicating that current probes are to be created for the objects |
|
selected from the schematic or the navigator. |
nil |
Removes the checkmark next to the Currents at terminals or |
|
ports label in the Waveforms pane of the AMS Options window, |
|
indicating that current probes are not to be created. This is the |
|
default. |
Example
amsDirect.prep wfDefInstSaveCurrents boolean t
Places a checkmark next to the Currents at terminals or port labels, indicating that current probes are to be created for objects selected from the schematic or the navigator.
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Virtuoso AMS Environment User Guide
Variables for ams.env Files
wfDefInstSaveVoltages
Controls whether voltage probes are created for instances selected from the schematic or the navigator.
Syntax
amsDirect.prep wfDefInstSaveVoltages boolean t | nil
Values |
|
t |
Places a checkmark next to the Voltages/Signals label in the |
|
Waveforms pane of the AMS Options window, indicating that |
|
voltage probes are to be created for instances selected from the |
|
schematic or navigator. This is the default. |
nil |
Removes the checkmark next to the Voltages/Signals field in |
|
the Waveforms pane of the AMS Options window, indicating |
|
that voltages are not to be created for instances selected from |
|
the schematic or navigator. |
Example
amsDirect.prep wfDefInstSaveVoltages boolean nil
Removes the checkmark next to the Voltages/Signals label so voltage probes are not created for objects selected from the schematic or navigator.
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Variables for ams.env Files
wfDefInstVSaveAll
Specifies whether voltage probes are to be created for all levels of the instances selected from the schematic or the navigator.
Syntax
amsDirect.prep wfDefInstVSaveAll t | nil
Values |
|
t |
Specifies that voltage probes are to be created for all levels of the |
|
selected instances. This choice is indicated in the AMS Save/ |
|
Plot list by the word all appearing in the Depth column for the |
|
selected instances |
nil |
Specifies that voltage probes for the selected instances are to be |
|
created only for the number of levels specified by the |
|
amsDirect.prep wfDefInstVSaveLvl variable. This is the |
|
default. |
Example
amsDirect.prep wfDefInstVSaveAll nil
Specifies that voltage probes are to be created for all levels of the selected instances.
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Variables for ams.env Files
wfDefInstVSaveLvl
Specifies that voltage probes for the specified number of levels are to be created for instances selected from the schematic or the navigator.
Syntax
amsDirect.prep wfDefInstVSaveLvl int level
Values |
|
level |
The number of levels of voltage probes to be created for the |
|
selected instances. The default value is 1. |
Example
amsDirect.prep wfDefInstVSaveLvl int 2
Specifies that voltage probes are to be created for two levels of each of the selected instances. In the AMS Save/Plot list, the Depth column for the selected instances contains the value 2.
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