III Answer the following questions:

1. When did Texas Instruments develop a mask-programmable IC?

2. What was the TNS 2000 programmed by?

3. What dwvice was more popular than TI part?

4. What technology was a programmable logic device based on in 1971?

5. Why did GE enter into agreement with Monolithic Memories in 1974?

6. Why was the architecture of a breakthrough device in 1978 simpler that that of Signetics FPLA?

IV Give the equivalents to the following words:

Металеве покриття, пристрій, регістри памяті, обмежувати, видатний, виробляти, ринок, дешевий, десятиріччя, бути заснованим на основі.

V Choose the correct variant:

1. Music centers consist _____ several audio input devices.

a) in; b) at; c) of; d) to.

2. The common amplifier is made ____ ____ two sections.

a) out of; b) up of; c) out from; d) in with/

3. These allow the user to play ____ music.

a) -; b) in; c) at; d) of.

4. A music centre system depends _____ the quality of its sound reproduction.

a) from; b) upon; c) on; d)-.

5. Graphic equalizer allows _____ the user to adjust the amplifications by moving an array.

a) to; b) for; c) on; d)-.

VI Translate the text in writing: Microprocessor Subsystem to fpga Interfaces

The value of intergrating a processor and FPGA increases substantially with the incorporation of multiple hihg-speed data exchange interfaces. The Excalibur processor has two AHB bridges on AHB2 that allow the processor (or other master within the sybsystem) and the FPGA to each act as bus masters on the AHB2 bus. By functioning as bus masters on the AHB2 bus. By functioning as bus master, the master can initiate a data transfer through the bus bridge in either direction. Moreover, allowing the FPGA and the processor to initiate bus transfers enables the creation of complex systems that provide real-time interaction, between the processor and FPGA, to form complete system-on-a-programmable-chip (SOPC) designs.

The dual-port SRAM memory is accessible from both the FPGA and the processor. Data can be written to and read from this memory space, providing a simple shared data area for applications interfaces. One such application is for the processor to interface to a digital signal processing (DSP) function implrmrnted in the FPGA by reading and writing the appropriate memory spaces within the dual-port memory.

Unit 5 How plDs retain their configuration

I Read and memorize the following words and words-combinations:

1. PLD(programmable logic device) – програмуючий логічний пристрій

2. retain – зберігати

3. silicon – кремній

4. EPROM або EEROM – постійно запам’ятовуючий пристрій

5. fuse – запобіжник, плавитись

6. SRAM або RAM – запам’ятовуючий пристрій з вільною виборкою

7. volatile – непостійний, мінливий

8. circuit – схема

9. switch on – включати

10. switch off – виключати

11. trapping – пастка

12. gate – ворота

13. exposing – виставлення, піддавання

14. eraser – стирати(ння)

15. Flash memory – флешпам’ять (різновидність твердотілої напівпровідникової пам’яті)

16. CPLDs – програмуючий логічний пристрій

17. PAL (phase-alternating line) – система аналогового кольорового телебачення

18. inconvenience – незручність