1. Purpose of work
Studying of the construction and operation principles of local network switch.
2. Key positions
2.1 In any node of a network where two and more communication lines converge and which is intermediate along the line data flows, such functions as switching, concentration, multiplexing and routing can be fulfilled. For their implementation in the node are installed special equipment which defined by the common concept «the active network equipment». The network equipment can perform one of the listed functions and be named "switch", "hub", "router", or to combine a number of functions (for example, the automatic telephone exchange fulfils functions of concentration, switching, routing).
Application of those or other devices depends on type of network segment organization (a local area network, a territorial network), and also requirements for efficiency of a network, possibility of its growth (scaling) and reconfiguration (topology change).
2.2 Switches for today are most widely used network devices at the organisation of local area networks because completely satisfy the requirements specified above. The first awitch for local area networks has appeared under Ethernet technology. The generalised block diagramme of Ethernet switch is presented on fig. 1.
Each port is serviced by one processor of packages Ethernet - ЕРР (Ethernet Packet Processor). Besides, the switch has the system unit which introduces operation of all processors ERR. The system unit carries on the common translation table of the switch and provides control of switch operation.
For transmission of frames between ports it is used switching matrix such as in telephone switch or multiprocessor computers, connecting some processors with several memory modules. The switching matrix works by a circuit switching principle. For 8 ports the switching matrix can provide 8 simultaneous internal channels at a half-duplex operating mode of ports and 16 - at full-duplex when the transmitter and the receiver of each port work independently from each other.
With frame arrival in any port processor ERR buffers several first byte of frame to read the destination address. After reception of the destination address the processor make decision about package transmission, not waiting arrival of the others frame byte. For this purpose it analyze its own cache (buffer memory) address table and if do not find there the necessary address, accesses to the system unit which works in multitasking, in a parallel way servicing inquiries of all processors ERR. The system unit makes review of the common translation table and returns to the processor the found string which buffers in the cache for subsequent usage.
Picture 1 – General switch structure
After finding of destination address processor ERR knows that it is necessary to do with an arriving frame (during review of a translation table the processor continued buffering of bytes of a frame arriving in port). If the frame needs to be filtered, the processor simply stops to write in the buffer frame bytes, clears the buffer and waits for arrival of a new frame.
If it is necessary to transfer a frame to other port the processor accesses to a switching matrix and tries to install in it the path linking to port with port through which there is a path to the assignment address. The switching matrix is able to do it only in that case when the port of the address of assignment during this moment is free, that is, is not connected to other port.
If the port is occupied, that, as well as in any device with circuit switching, the matrix refuses in connection. In this case the frame is completely buffered by the processor of entry port then the processor expects clearing of output port and derivation by a switching matrix array of the necessary path.
After the necessary path is installed buffering bytes of a frame which are accepted by the processor of output port are routed to it. As soon as the processor of output port gets access to segment Ethernet connected to it, frame bytes start to be transferred at once in a network. The processor of entry port permanently stores some byte of an accepted frame in the
The buffer that allows it independently and asynchronously to accept and transfer frame bytes.
At free at the moment of reception of a frame a status of output port the delay between reception of the first byte of a frame by the switch and appearance of the same byte on an output of port of the address of assignment makes no more than 40 мкс.
The main reason of rise of productivity of a network at switch usage is parallel processing of several frames. This effect illustrates fig. 2.
Fig. 2 Parallel transmission of frames by the switch
The common productivity of the switch in the resulted example will be 4x10 = 40 Mbit/s, and if to simplify an example for N ports - (N/2) x10 Mbit/s. It is said that the switch gives to each server or a segment, connected to its ports, the selected capacity of the protocol (10 Mbit/s)
If the port works in a half-duplex mode, for example Ethernet 10 Mbit/s productivity of port Cpi is equal 10 Mbit/s and if in full-duplex it Cpi will make 20 Mbit/s.
The internal arrangement of switches of various manufacturers sometimes very differs, however the principle of parallel processing of frames on each port remains the same.
2.3 Implementation of switching function in switches.
Now switches use one from three circuits of inputs and outputs processors interaction:
• switching matrix;
• divided multiport memory;
• the common bus.
Often these three ways of interaction are combined in one switch.
Switches on the basis of switching matrix
The switching matrix - the main and fastest way of interaction of processors ports, it has been realised in the first industrial switch of local area networks. However, matrix implementation is possible only for certain number of ports, and complexity of the circuit increases proportionally to a square of quantity of ports of the switch (fig. 3).
Fig. 3 Crosspoint array
Switches with divided memory
The following foundation architecture of interaction of ports – doubleinput divided memory. The example of such architecture is resulted in a figure 4.
Entry blocks of processors ports incorporate to a switched input of divided memory, and output blocks of the same processors incorporate to a switched output of this memory. Switching of an input and an output of divided memory is managing by queues of output ports controls. In divided memory the manager will organise some queues of data, on one for each output port. Entry blocks of processors transfer to the manager of ports inquiries about data record in queue of that port which corresponds to the address of assignment of a package. The manager by turns connects a memory input to one of entry blocks of processors and that copies a part of data of a frame in queue of certain output port. In process of filling of queues the manager makes also serial connection of an output of divided memory to output blocks of processors of ports, and data from queue correspond in a processor backend.
Memory
should be enough high-speed for maintenance of speed of transcription
of data between N switch ports. Application of the common buffer
memory is floppy arranged by the manager between separate ports,
reduces requirements to the size of buffer memory of the processor of
port.
Fig.
4. The architecture of divided memory
Switches with the common bus
Switches with the common bus use for link of processors of ports the high-speed bus in time sharing. The bus here is a passive unit, and the active role is fulfilled by processors of ports.
The example of such architecture is resulted in a figure 5. For the purpose bus was not a switch drawback, its productivity should be at least in N/2 (where N number of ports) time above speed of arrival of the processors of ports given in entry blocks. Besides, the frame should be transferred on the bus by small parts, on some byte not to bring delays in frame transmission as a whole. The size of such cell of data is defined by the manufacturer of the switch.
The processor entry block places in a cell transferred on the bus, a tag in which specifies number of port of destination. Each output block of the processor of port contains the filter of tags which selects the tags intended to given port.
The
bus as well as the switching matrix cannot carry out intermediate
buffering but as frame data are divided into small cells delays with
initial waiting of availability of output port in such circuit are
not present.
Fig. 5. The common bus architecture
Combined switches
Each of the described architectures has advantages and disadvantages, therefore is frequent in difficult switches these architectures are applied in a combination with each other.
2.4 Intellectual switches
Except the basic purpose - rises of capacity of links - the switch allows to build the segments of the network isolated at logical level which streams of the information are not intersected, and also to inspect these streams and to control them. These functions allocate the so-called intellectual switch.
The organisation of logically isolated network segments has received the name of technology of virtual local area networks (Virtual LAN, VLAN).
The group of network computers creating a segment which traffic is completely isolated from computers of other network segments is named as a virtual network. At the same time in a virtual network frames are transferred on technology of switching, that is to that port which is linked to the address of assignment of a frame.
The technology of virtual networks allows reconfiguring a network (to change its topology) by program way, not resorting to physical reconstruction of a network.
Virtual networks can be intersected, if one or several computers are a part more than one virtual network.
On fig. 6 server of e-mail is a part of 3 and 4 virtual networks. It means that its frames are transferred by switches to all computers entering into these networks. If any computer is a part only of a virtual network 3, it Frames 4 will not reach a network, but it can co-operate with computers of a network 4 through the common mail server.
Fig. 6 Virtual networks
The technology of virtual networks is mirrored in standard IEEE 802.1Q which defines base rules of construction of the virtual local area networks, not dependent on the protocol of channel level which supports the switch.
At creation of virtual networks on the basis of one switch the grouping mechanism in a network of switch ports (fig. 7) is usually used. Thus each port is assigned this or that virtual network. The frame which has come from port, belonging, for example, to a virtual network 1, will be never transferred port which does not belong to this virtual network. The port can be assigned to several virtual networks though in practice so do seldom - the effect of complete isolation of networks disappears.
Grouping of ports for one switch - the most logical way of derivation VLAN as the virtual networks constructed on the basis of one switch, cannot be more than ports. If the segment constructed on the basis of the hub sites of such segment do not need to be included in different virtual networks is connected to one port - all the same the traffic of these sites will be the common.
Creation of virtual networks on the basis of grouping of ports does not demand from the manager of great volume of hand-held operation - enough each port to assign to one of the several in advance named virtual networks. Usually such operation is fulfilled by means of the special program applied on the switch. Performance of this procedure is provided in the given laboratory operation.
Fig. 7 Grouping of ports of the switch
2.5 Common description of switch FNSW-16/2400S PLANET
Switch FNSW-16/2400S PLANET belongs to the class of intellectual switches. In a local area network of laboratory of chair of Communication networks it fulfils function of an access switch of the local segment including 10 computers. Using technology VLAN, by ports grouping of this switch the specified segment can be divided into smaller network segments, not resorting to physical sharing of a network. It is very convenient for a case when it is necessary to organise fast networks for small user groups, each of which solves the independent task. These workgroups can organise access to the common informational resources, having included with a server to which they are concentrated, in structure of each group.
The front panel of the switch
The front panel of switch FNSW-16/2400S PLANET is presented on fig. 8.
Fig. 8 Front panel of switch FNSW-16/2400S
Let's consider assignment of ports. In switch FNSW-16/2400S there are 16 ports of the standard 100Base-TX (a copper cable a twisted pair, transmission bitrate 100 Mbit/s) with RJ-45 plugs and AUI the standard 100Base-FX (fiber optic cable) with the special plug for connection of the external transceiver. By means of this port the switch is connected to the main cable connecting hubs among themselves, or connection of the computer remote from the switch more than on 500 m. thus is provided
The usual port with RJ-45 plugs, intended for network adapter connection, is named MDI-X (кроссированный MDI). It has the inverted bussing of contacts of the plug that allows to connect a workstation network adapter to the switch by means of a standard connective cable not кроссирующего contacts.
In case of connection of switches through standard port with MDI-X as a rule it is necessary to use a non-standard cable with cross connection of pairs. To simplify this procedure in the given switch the MDI-switch with which help port MDI-X switches in MDI port in which is not present кроссирования pairs is provided.
All ports 100Base-TX automatically provide possibility of connection of computers in a full-duplex mode. At connection in segment port, from the several computers united by the hub, automatically switch on a half-duplex mode. The transfer rate through port can be customised compulsorily through cantilever port if in it there is a necessity.
Cable
Switch ports provide possibility of connection of a copper cable - a standard twisted pair 100Base-TX and a usual telephone cable of the standard 10Base-T.