42.3 The basis of sdh

Before investigating the SDH standards in detail, it is worth pausing for an overview of what SDH is designed to achieve, and the general way it goes about this task.

As with PDH, SDH is designed to transport isochronous traffic channels and is focused very much on layer one of the well known ISO seven layer OSI protocol hierarchy. Again, like PDH, SDH is based on a hierarchy of continuously repeating, fixed length frames. This contrasts with the majority of competing standards, almost all of which attempt to deliver more efficient use of both transmission and switching plant by employing some form of packetisation of the transported information. Usually, these packets are launched into the network asynchronously and arrive at their destinations with a non-deterministic delay. Consequently, they present something of a problem to delay sensitive voice circuits, which still constitute 80% of all traffic, in even the world's most advanced networks. SDH, on the other hand, was formulated on the premise that despite the pressure to support novel forms of business oriented services, it is of paramount importance to preserve a smooth interworking with the existing PDH networks, most of which were designed to serve the PSTN above all else. At the same time, it was also apparent that the increasingly widespread deployment of optical fibres would rapidly reduce the cost of raw transmission bandwidth, hence there was relatively little pressure to restrict the proportion of bandwidth devoted to multiplexing overheads, as opposed to the traffic pay-load. Beyond the transport of isochronous traffic channels, and smooth interworking with the existing PDH, the developers of SDH also addressed those weaknesses of the PDH that were identified above. They recognised that it was necessary to adopt not only a synchronous frame structure, but one which also preserved the byte boundaries in the various traffic bit-streams. The basic SDH frame structure is one that repeats at intervals of 125μs i.e. it is tailor made for the transport of 64khit/s channels, or any higher rate channels which are an integer multiple of 64khit/s. (See Figure 42.3.) In fact, with one rather important exception dealt with in Section 42.4, SDH currently focuses on the transport of 2.048Mbit/s, 34Mbit/s and 140Mbit/s circuits, plus their North American counterparts at 1.5Mbit/s, 6Mbit/s and 45Mbit/s.

The general way that any of these PDH rate circuits are trans­ported by SDH is to map such a circuit into a "Synchronous Con­tainer". (See Figure 42.4.) A Synchronous Container can be viewed as a subdivision of the basic SDH frame structure, and it consists of a predefined number of 64kbit/s channels. The entire family of Synchronous Containers comprises only a few different types, each of which has been sized to accommodate one or more of the common plesiochronous transmission rates, without wasting too much bandwidth. The operation of mapping a plesiochronous cir­cuit into such a Synchronous Container is very similar to the normal stuffing operation performed in a conventional PDH multiplexer. However, in this case, the plesiochronous channel is being syn­chronised not to the master oscillator in a PDH multiplexer, but to the frequency of the Synchronous Container, which is, in turn, synchronous to the basic SDH frame structure. (See Figure 42.5.)

Before examining the question of exactly what the SDH frame structure is synchronous with, it is worth digressing to discuss a further operation specified by SDH. This is the attachment of an Overhead, known as the Path Overhead (POH), to each Syn­chronous Container (See Figure 42.4.) The idea is that once a plesiochronous circuit has been loaded into a Synchronous Con­tainer, this Container has a defined set of POH bytes appended to it, which remain completely unchanged until the Synchronous Con­tainer arrives at its destination. The combination of Synchronous Container plus POH is known as a Virtual Container (VC). The VC POH bytes allow a PTO to monitor several parameters, the most important of which is the error rate of the VC between the points at which it was loaded and unloaded with its plesiochronous payload. This provides a PTO with the much sought after end to end perform­ance monitoring that was so difficult using conventional PDH techniques.

Most plesiochronous channels are bi-directional, hence there are usually two continuous streams of VCs travelling in opposite direc­tions between the two end points at which the plesiochronous channel enters and leaves the SDH portion of a network. Viewed in this way, the job of an SDH based network is to load its VCs with (usually) convention PDH channels, and then transport these to their various destinations together with an accurate indication of the quality of the delivered VC payload.

Figure 42.4 Example of the creation of a VC

This process of loading containers and then attaching POHs is repeated at several levels in SDH, resulting in the nesting of smaller VCs within larger ones. (See Figure 42.6.) The nesting hierarchy stops when the largest level of VC is loaded into the payload area of a Synchronous Transport Module (STM). These logical STM sig­nals are seen at the interlace between any two pieces of SDH equipment, where they can be presented either electrically or, more usually, optically. (See Fig 42.2.) Such an interface is referred to as a Network Node Interface (NNI), because it is usually confined to the internal interfaces within the network, rather than any interlace presented to a network user. A User Network Interface (UNI) has also been defined, however, the way in which the payload informa­tion in a UNI is mapped into a standard NNI signal is not yet completely defined, and hence it is not widely used. Finally, the reason for the name Virtual Container is that unlike the STM signals that appear at the NNI, VC signals are never presented to the outside world. They exist only within pieces of SDH equipment or within STM signals, hence an SDH network element can have NNI and PDH interfaces, but never VC interfaces.

Returning to the question of exactly what is synchronised to what, the basic problem is that, as outlined in Section 42.2, it is very difficult to maintain a complete transmission network in rigid syn­chronisation for all time. Even if we could tolerate the delays introduced by the addition of the numerous "wander buffers" necess­ary to accommodate the slow changes in transmission medium delay, there is no guarantee that different PTOs' networks would all be synchronised to the same master clock. For a network based on the SDH, this problem translates to that of how to synchronously multiplex and demultiplex many individual VCs, which, because they have been created in disparate parts of the same, or even different SDH networks, may have slightly different short term bit rates.