Fundamentals of Microelectronics

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Sec. 6.2 Operation of MOSFET

Solution

We write

I

=

1

C

W

(V

, V

)2(1 + V

)

D1

2

n ox L

GS

TH

DS1

I

=

1

C

W

(V

, V

)2

(1 + V

)

D2

2

n ox L

GS

TH

DS2

and hence

ID2 = ID1 1 + VDS2 :

1 + VDS1

With ID1 = 1 mA, VDS1 = 0:5 V, VDS2 = 1 V, and = 0:1 V,1,

ID2 = 1:048 mA:

The change in ID is therefore equal to 48 A, yielding an output impedance of

rO = VDS

ID

= 10:42 k :

Exercise

Does W affect the above results?

301

(6.35)

(6.36)

(6.37)

(6.38)

(6.39)

(6.40)

The above example reveals that channel-length modulation limits the output impedance of MOS current sources. The same effect was observed for bipolar current sources in Chapters 4 and 5.

Example 6.10

Assuming / 1=L, calculate ID and rO in Example 6.9 if both W and L are doubled.

Solution

In Eqs. (6.35) and (6.36), W=L remains unchanged but drops to 0.05 V,1. Thus,

1	+ VDS2	(6.41)
ID2 = ID1 1	+ VDS1
= 1:024 mA:		(6.42)

That is, ID = 24 A and

rO = 20:84 k :

(6.43)

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302

Chap. 6

Physics of MOS Transistors

Exercise

What output impedance is achieved if W and L are quadrupled and ID is halved.

6.2.4 MOS Transconductance

As a voltage-controlled current source, a MOS transistor can be characterized by its transconductance:

gm =	@ID	:	(6.44)
	@VGS

This quantity serves as a measure of the “strength” of the device: a higher value corresponds to a greater change in the drain current for a given change in VGS. Using Eq. (6.17) for the saturation region, we have

gm = nCox W	(VGS , VTH);	(6.45)
L

concluding that (1) gm is linearly proportional to W=L for a given VGS , VTH, and (2) gm is linearly proportional to VGS , VTH for a given W=L. Also, substituting for VGS , VTH from (6.17), we obtain

gm = r2 nCox W ID:	(6.46)
L

That is, (1) gm is proportional to pW=L for a given ID, and (2) gm is proportional to pID for a given W=L. Moreover, dividing (6.45) by (6.17) gives

gm =	2ID	;	(6.47)
	VGS , VTH

revealing that (1) gm is linearly proportional to ID for a given VGS ,VTH, and (2) gm is inversely proportional to VGS , VTH for a given ID. Summarized in Table 6.1, these dependencies prove critical in understanding performance trends of MOS devices and have no counterpart in bipolar transistors.12. Among these three expressions for gm, (6.46) is more frequently used because ID may be predetermined by power dissipation requirements.

Example 6.11

For a MOSFET operating in saturation, how do gm and VGS , VTH change if both W=L and ID are doubled?

Solution

Equation (6.46) indicates that gm is also doubled. Moreover, Eq. (6.17) suggests that the overdrive remains constant. These results can be understood intuitively if we view the doubling of W=L and ID as shown in Fig. 6.27. Indeed, if VGS remains constant and the width of the device is doubled, it is as if two transistors carrying equal currents are placed in parallel, thereby doubling the transconductance. The reader can show that this trend applies to any type of transistor.

12There is some resemblance between the second column and the behavior of gm = IC=VT . If the bipolar transistor width is increased while VBE remains constant, then both IC and gm increase linearly.

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Sec. 6.2 Operation of MOSFET

W		Constant	W	Variable
L			L
VGS	− VTH Variable		VGS − VTH Constant
g m		I D	g m		I D
g		VGS − VTH	g		W
				m	L
m

Table 6.1 Various dependencies of gm.

VGS

VDS

Figure 6.27 Equivalence of a wide MOSFET to two in parallel.

303

W	Variable
L
VGS − VTH Constant
g m	W
	L
	1

g m	VGS − VTH

VGS

VDS

Exercise

How do gm and VGS , VTH change if only W and ID are doubled?

6.2.5 Velocity Saturation

Recall from Section 2.1.3 that at high electric fields, carrier mobility degrades, eventually leading to a constant velocity. Owing to their very short channels (e.g., 0.1 m), modern MOS devices experience velocity saturation even with drain-source voltages as low as 1 V. As a result, the I/V characteristics no longer follow the square-law behavior.

Let us examine the derivations in Section 6.2.2 under velocity saturation conditions. Denoting the saturated velocity by vsat, we have

ID = vsat Q	(6.48)
= vsat W Cox(VGS , VTH):	(6.49)

Interestingly, ID now exhibits a linear dependence on VGS , VTH and no dependence on L.13

This section can be skipped in a first reading.

13Of course, if L is increased substantially, while VDS remains constant, then the device experiences less velocity saturation and (6.49) is not accurate.

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	304		Chap. 6	Physics of MOS Transistors
	We also recognize that
	gm =	@ID		(6.50)
		@VGS
	= vsatW Cox;			(6.51)

a quantity independent of L and ID.

6.2.6 Other Second-Order Effects

Body Effect In our study of MOSFETs, we have assumed that both the source and the substrate (also called the “bulk” or the “body”) are tied to ground. However, this condition need not hold in all circuits. For example, if the source terminal rises to a positive voltage while the substrate is at zero, then the source-substrate junction remains reverse-biased and the device still operates properly.

Figure 6.28 illustrates this case. The source terminal is tied to a potential VS with respect to ground while the substrate is grounded through a p+ contact.14 The dashed line added to the transistor symbol indicates the substrate terminal. We denote the voltage difference between the source and the substrate (the bulk) by VSB.

Substrate	VS		VG		VD
Contact				VD
					VG
	p+	n+		n+
					VS
	p −substrate
Figure 6.28	Body effect.

An interesting phenomenon occurs as the source-substrate potential difference departs from zero: the threshold voltage of the device changes. In particular, as the source becomes more positive with respect to the substrate, VTH increases. Called “body effect,” this phenomenon is formulated as

VTH = VTH0 + (pj2 F + VSBj , pj2 F j);

(6.52)

where VTH0 denotes the threshold voltage with VSB = 0 (as studied earlier), and and F are technology-dependent parameters having typical values of 0.4 pV and 0.4 V, respectively.

Example 6.12

In the circuit of Fig. 6.28, assume VS = 0:5 V, VG = VD = 1:4 V, nCox = 100 A=V2, W=L = 50, and VTH0 = 0:6 V. Determine the drain current if = 0.

Solution

Since the source-body voltage, VSB = 0:5 V, Eq. (6.52) and the typical values for and F yield

VTH = 0:698 V:

(6.53)

14The p+ island is necessary to achieve an “ohmic” contact with low resistance.

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Sec. 6.3 MOS Device Models

305

Also, with VG = VD, the device operates in saturation (why?) and hence

ID =	1	nCox W	(VG , VS , VTH )2	(6.54)
	2	L
=	102 A:			(6.55)

Exercise

Sktech the drain current as a function of VS as VS goes from zero to 1 V.

Body effect manifests itself in some analog and digital circuits and is studied in more advanced texts. We neglect body effect in this book.

Subthreshold Conduction The derivation of the MOS I/V characteristic has assumed that the transistor abruptly turns on as VGS reaches VTH. In reality, formation of the channel is a gradual effect, and the device conducts a small current even for VGS < VTH . Called “subthreshold conduction,” this effect has become a critical issue in modern MOS devices and is studied in more advanced texts.

6.3 MOS Device Models

With our study of MOS I/V characteristics in the previous section, we now develop models that can be used in circuit analysis and design.

6.3.1 Large-Signal Model

For arbitrary voltage and current levels, we must resort to Eqs. (6.9) and (6.34) to express the device behavior:

I

=

1

C

W

[2(V

, V

)V

, V 2

] Triode Region

(6.56)

D

2

n

ox L

GS

TH

DS

DS

ID

=

1

nCox W

(VGS , VTH )2(1 + VDS) Saturation Region

(6.57)

2

L

In the saturation region, the transistor acts as a voltage-controlled current source, lending itself to the model shown in Fig. 6.29(a). Note that ID does depend on VDS and is therefore not an ideal current source. For VDS < VGS , VTH, the model must reflect the triode region, but it can still incorporate a voltage-controlled current source as depicted in Fig. 6.29(b). Finally, if VDS 2(VGS , VTH), the transistor can be viewed as a voltage-controlled resistor [Fig. 6.29(c)]. In all three cases, the gate remains an open circuit to represent the zero gate current.

Example 6.13

Sketch the drain current of M1 in Fig. 6.30(a) versus V1 as V1 varies from zero to VDD. Assume

= 0.

Solution

Noting that the device operates in saturation (why?), we write

ID =	1	nCox W	(VGS , VTH )2	(6.58)
	2	L

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306

Chap. 6

VGS < VTH

VDS < VGS

− VTH

G

1

D

W (V

I D

µ

n

C

2

ox L

GS

S

(a)

−

Physics of MOS Transistors

VTH

(

2 (1+ λVDS )

VGS < VTH

VDS > VGS

− VTH

G

D

W [ 2

I D

1

µ

n

C

(V

2

ox L

GS

S

(b)

−

VTH

(

VDS + VDS2 ]

VGS < VTH

V

>> 2

(V

− V

TH

(

DS

GS

G

D

1

Ron =

W (V

µ

n

C

ox L

GS

S

(c)

−

VTH

(

Figure 6.29 MOS models for (a) saturation region, (b) triode region, (c) deep triode region.

VDD

I D

M 1

V1

VDD − VTH

(a)

(b)

V1

Figure 6.30 (a) Simple MOS circuit, (b) variation of ID with V1.

=	1	C	W	(V		, V	1	, V		)2:	(6.59)
	2	n	ox L		DD				TH

At V1 = 0, VGS = VDD and the device carries maximum current. As V1 rises, VGS falls and so does ID. If V1 reaches VDD , VTH , VGS drops to VTH , turning the transistor off. The drain current thus varies as illustrated in Fig. 6.30(b). Note that, owing to body effect, VTH varies with V1 if the substrate is tied to ground.

Exercise

Repeat the above example if the gate of M1 is tied to a voltage equal to 1.5 V and VDD = 2 V.

6.3.2 Small-Signal Model

If the bias currents and voltages of a MOSFET are only slightly disturbed by signals, the nonlinear, large-signal models can be reduced to linear, small-signal representations. The development

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Sec. 6.3 MOS Device Models

307

of the model proceeds in a manner similar to that in Chapter 4 for bipolar devices. Of particular interest to us in this book is the small-signal model for the saturation region.

Viewing the transistor as a voltage-controlled current source, we draw the basic model as in Fig. 6.31(a), where iD = gmvGS and the gate remains open. To represent channel-length modulation, i.e., variation of iD with vDS, we add a resistor as in Fig. 6.31(b):

G	D	G		D
v GS	gmv GS		v GS	gmv GS r O
	S			S
	(a)			(b)

Figure 6.31 (a) Small-signal model of MOSFET, (b) inclusion of channel-length modulation.

		,1
rO =		@ID				(6.60)
		@VDS
=				1	:	(6.61)
	1		W	(VGS , VTH )2
2		nCox L

Since channel-length modulation is relatively small, the denominator of (6.61) can be approximated as ID , yielding

rO	1	:	(6.62)
	ID

Example 6.14

A MOSFET is biased at a drain current of 0.5 mA. If nCox = 100 A=V2, W=L = 10, and= 0:1 V,1, calculate its small-signal parameters.

Solution

	We have
	gm = r2 nCox W ID							(6.63)
							L
	=		1			:		(6.64)
		1 k
	Also,
	rO		=			1		(6.65)
					ID
			= 20 k :					(6.66)

This means that the intrinsic gain, gmrO, (Chapter 4) is equal to 20 for this choice of device dimensions and bias current.

Exercise

Repeat the above example if W=L is doubled.

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308

Chap. 6

Physics of MOS Transistors

6.4 PMOS Transistor

Having seen both npn and pnp bipolar transistors, the reader may wonder if a p-type counterpart exists for MOSFETs. Indeed, as illustrated in Fig. 6.32(a), changing the doping polarities of the substrate and the S/D areas results in a “PMOS” device. The channel now consists of holes and is formed if the gate voltage is below the source potential by one threshold voltage. That is, to turn the device on, VGS < VTH , where VTH itself is negative. Following the conventions used for bipolar devices, we draw the PMOS device as in Fig. 6.32(b), with the source terminal identified by the arrow and placed on top to emphasize its higher potential. The transistor operates in the triode region if the drain voltage is near the source potential, approaching saturation as VD falls to VG , VTH = VG + jVTHj. Figure 6.32(c) conceptually illustrates the gate-drain voltages

G required for each region of operation.

S	D	S
p+	p+	G
		I D
n −substrate		D
(a)		(b)
Triode	Edge of	Saturation
Region	Saturation	Region

	> VTHP	VTHP
		< VTHP

(c)

Figure 6.32 (a) Structure of PMOS device, (b) PMOS circuit symbol, (c) illustration of triode and saturation regions based on gate and drain voltages.

Example 6.15

In the circuit of Fig. 6.33, determine the region of operation of M1 as V1 goes from VDD to zero. Assume VDD = 2:5 V and jVTH j = 0:5 V.

VDD

M 1

V1

1 V

Figure 6.33 Simple PMOS circuit.

Solution

For V1 = VDD, VGS = 0 and M1 is off. As V1 falls and approaches VDD,jVTHj, the gate-source

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Sec. 6.4 PMOS Transistor

309

potential is negative enough to form a channel of holes, turning the device on. At this point, VG = VDD ,jVTH j = +2 V while VD = +1 V; i.e., M1 is saturated [Fig. 6.32(c)]. As V1 falls further, VGS becomes more negative and the transistor current rises. For V1 = +1 V , jVTHj = 0:5 V, M1 is at the edge of the triode region. As V1 goes below 0.5 V, the transistor enters the triode region further.

The voltage and current polarities in PMOS devices can prove confusing. Using the current direction shown in Fig. 6.32(b), we express ID in the saturation region as

ID;sat = ,	1	pCox W	(VGS , VTH)2(1 , VDS);	(6.67)
	2	L

where is multiplied by a negative sign.15 In the triode region,

I

D;tri

= ,

1

C

W

[2(V

, V

)V

, V 2

]:

(6.68)

2

p

ox L

GS

TH

DS

DS

Alternatively, both equations can be expressed in terms of absolute values:

jID;satj =

1

pCox W

(jVGSj , jVTH j)2(1 + jVDSj)

(6.69)

2

L

jI

j =

1

C

W

[2(jV

j , jV

j)jV

j , V 2 ]:

(6.70)

D;tri

2

p

ox L

GS

TH

DS

DS

The small-signal model of PMOS transistor is identical to that of NMOS devices (Fig. 6.31). The following example illustrates this point.

Example 6.16

For the configurations shown in Fig. 6.34(a), determine the small-signal resistances RX and RY . Assume 6= 0.

R X						M 2
	V	i X
	DD		v 1	g	v	1 r O2
	M 2
		v 1	i Y	m2
M 1	v x		gm1v 1 r O1
			v Y
	R Y
(a)		(b)		(c)

Figure 6.34 (a) Diode-connected NMOS and PMOS devices, (b) small-signal model of (a), (c) smallsignal model of (b).

Solution

For the NMOS version, the small-signal equivalent appears as depicted in Fig. 6.34(b), yielding

RX = vX							(6.71)
iX
= (g	v		+	vX	)	1	(6.72)
		X
m1				rO1		iX

15To make this equation more consistent with that of NMOS devices [Eq. (6.34)], we can define itself to be negative and express ID as (1=2) pCox(W=L)(VGS , VTH)2(1 + VDS). But, a negative carries little physical meaning.

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310

Chap. 6

Physics of MOS Transistors

=

1

jjrO1:

(6.73)

gm1

For the PMOS version, we draw the equivalent as shown in Fig. 6.34(c) and write

RY = vY

(6.74)

iY

= (g

m2

v

+

vY

)

1

(6.75)

Y

rO1

iY

=

1

jjr

:

(6.76)

gm2

O2

In both cases, the small-signal resistance is equal to 1=gm if ! 0.

In analogy with their bipolar counterparts [Fig. 4.44(a)], the structures shown in Fig. 6.34(a) are called “diode-connected” devices and act as two-terminal components: we will encounter many applications of diode-connected devices in Chapters 9 and 10.

Owing to the lower mobility of holes (Chapter 2), PMOS devices exhibit a poorer performance than NMOS transistors. For example, Eq. (6.46) indicates that the transconductance of a PMOS device is lower for a given drain current. We therefore prefer to use NMOS transistors wherever possible.

6.5 CMOS Technology

Is it possible to build both NMOS and PMOS devices on the same wafer? Figures 6.2(a) and 6.32(a) reveal that the two require different types of substrate. Fortunately, a local n-type substrate can be created in a p-type substrate, thereby accommodating PMOS transistors. As illustrated in Fig. 6.35, an “n-well” encloses a PMOS device while the NMOS transistor resides in the p-substrate.

	NMOS		PMOS
	Device		Device	G
	G
B	S	D	S	D	B
p+	n+	n+	p+	p+	n+

n −well

p −substrate

Figure 6.35 CMOS technology.

Called “complementary MOS” (CMOS) technology, the above structure requires more complex processing than simple NMOS or PMOS devices. In fact, the first few generations of MOS technology contained only NMOS transistors,16 and the higher cost of CMOS processes seemed prohibitive. However, many significant advantages of complementary devices eventually made CMOS technology dominant and NMOS technology obsolete.

16The first Intel microprocessor, the 4004, was realized in NMOS technology.