Fundamentals of Microelectronics

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	311 (1)

Sec. 6.6

Comparison of Bipolar and MOS Devices

311

6.6 Comparison of Bipolar and MOS Devices

Having studied the physics and operation of bipolar and MOS transistors, we can now compare their properties. Table 6.2 shows some of the important aspects of each device. Note that the exponential IC-VBE dependence of bipolar devices accords them a higher transconductance for a given bias current.

Bipolar Transistor	MOSFET
Exponential Characteristic	Quadratic Characteristic
Active: VCB > 0	Saturation: VDS < VGS − VTH
Saturation: VCB < 0	Triode: VDS > VGS − VTH
Finite Base Current	Zero Gate Current
Early Effect	Channel−Length Modulation
Diffusion Current	Drift Current
−	Voltage−Dependent Resistor

Table 6.2 Comparison of bipolar and MOS transistors.

6.7 Chapter Summary

A voltage-dependent current source can form an amplifier along with a load resistor. MOSFETs are electronic devices that can operate as voltage-dependent current sources.

A MOSFET consists of a conductive plate (the “gate”) atop a semiconductor substrate and two junctions (“source” and “drain”) in the substrate. The gate controls the current flow from the source to the drain. The gate draws nearly zero current because an insulating layer separates it from the substrate.

As the gate voltage rises, a depletion region is formed in the substrate under the gate area. Beyond a certain gate-source voltage (the “threshold voltage”), mobile carriers are attracted to the oxide-silicon interface and a channel is formed.

If the drain-source voltage is small, the device operates a voltage-dependent resistor.

As the drain voltage rises, the charge density near the drain falls. If the drain voltage reaches one threshold below the gate voltage, the channel ceases to exist near the drain, leading to “pinch-off.”

MOSFETs operate in the “triode” region if the drain voltage is more than one threshold below the gate voltage. In this region, the drain current is a function of VGS and VDS. The current is also proportional to the device aspect ratio, W=L.

tem MOSFETs enter the “saturation region” if channel pinch-off occurs, i.e., the drain voltage is less than one threshold below the gate volatge. In this region, the drain current is proportional to (VGS , VTH)2.

MOSFETs operating in the saturation region behave as current sources and find wide application in microelectronic circuits.

As the drain voltage exceeds VGS , VTH and pinch-off occurs, the drain end of the channel begins to move toward the source, reducing the effective length of the device. Called “channel-length modulation,” this effect leads to variation of drain current in the saturation region. That is, the device is not an ideal current source.

A measure of the small-signal performance of voltage-dependent current sources is the “transconductance,” defined as the change in the output current divided by the change in

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	312 (1)

312

Chap. 6

Physics of MOS Transistors

the input voltage. The transconductance of MOSFETs can be expressed by one of three equations in terms of the bias voltages and currents.

Operation across different regions and/or with large swings exemplifies “large-signal behavior.” If the signal swings are sufficiently small, the MOSFET can be represented by a small-signal model consisting of a linear voltage-dependent current source and an output resistance.

The small-signal model is derived by making a small change in the voltage difference between two terminals while the the other voltages remain constant.

The small-signal models of NMOS and PMOS devices are identical.

NMOS and PMOS transistors are fabricated on the same substrate to create CMOS technology.

Problems

In the	following problems, unless	otherwise stated, assume nCox = 200 A=V2,
pCox	= 100 A=V2, and VTH	= 0:4 V for NMOS devices and ,0:4 V for PMOS
devices.

1. Two identical MOSFETs are placed in series as shown in Fig. 6.36. If both devices operate

M 1	M 2	M eq
W	W
L	L

Figure 6.36

as resistors, explain intuitively why this combination is equivalent to a single transistor, Meq. What are the width and length of Meq?

2.Consider a MOSFET experiencing pinch-off near the drain. Equation (6.4) indicates that the charge density and carrier velocity must change in opposite directions if the current remains constant. How can this relationship be interpreted at the pinch-off point, where the charge density approaches zero?

3.Calculate the total charge stored in the channel of an NMOS device if Cox = 10 fF= m2, W = 5 m, L = 0:1 m, and VGS , VTH = 1 V. Assume VDS = 0.

4.Referring to Fig. 6.11 and assuming that VD > 0,

(a)Sketch the electron density in the channel as a function of x.

(b)Sketch the local resistance of the channel (per unit length) as a function of x.

5.Assuming ID is constant, solve Eq. (6.7) to obtain an expression for V (x). Plot both V (x) and dV=dx as a function of x for different values of W or VTH .

6.The drain current of a MOSFET in the triode region is expressed as

ID = nCox W	(VGS , VTH )VDS ,	1V 2 :	(6.77)
L		2 DS

Suppose the values of nCox and W=L are unknown. Is it possible to determine these quantities by applying different values of VGS , VTH and VDS and measuring ID?

7.An NMOS device carries 1 mA with VGS,VTH = 0:6 V and 1.6 mA with VGS,VTH = 0:8 V. If the device operates in the triode region, calculate VDS and W=L.

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	313 (1)

Sec. 6.7

Chapter Summary

313

8.Compute the transconductance of a MOSFET operating in the triode region. Define gm = @ID=@VGS for a constant VDS. Explain why gm = 0 for VDS = 0.

9.An NMOS device operating with a small drain-source voltage serves as a resistor. If the supply voltage is 1.8 V, what is the minimum on-resistance that can be achieved with W=L = 20?

10.We wish to use an NMOS transistor as a variable resistor with Ron = 500 at VGS = 1 V and Ron = 400 at VGS = 1:5 V. Explain why this is not possible.

11.For a MOS transistor biased in the triode region, we can define an incremental drain-source resistance as

	,1
rDS;tri =	@ID	:	(6.78)
	@VDS

Derive an expression for this quantity.

12. It is possible to define an “intrinsic time constant” for a MOSFET operating as a resistor:

= RonCGS;

(6.79)

where CGS = W LCox. Obtain an expression for and explain what the circuit designer must do to minimize the time constant.

13. In the circuit of Fig. 6.37, M1 serves as an electronic switch. If Vin 0, determine W=L

	VG
Vin	M 1
	Vout
	RL

Figure 6.37

such that the circuit attenuates the signal by only 5%. Assume VG = 1:8 V and RL = 100 .

14.In the circuit of Fig. 6.37, the input is a small sinusoid superimposed on a dc level: Vin = V0 cos !t + V1, where V0 is on the order of a few millivolts.

(a)For V1 = 0, obtain W=L in terms of RL and other parameters so that Vout = 0:95Vin.

(b)Repeat part (a) for V1 = 0:5 V. Compare the results.

15.For an NMOS device, plot ID as a function of VGS for different values of VDS.

16.In Fig. 6.17, explain why the peaks of the parabolas lie on a parabola themselves.

17.Advanced MOS devices do not follow the square-law behavior expressed by Eq. (6.17). A somewhat better approximation is:

ID =	1	nCox W	(VGS , VTH) ;	(6.80)
	2	L

where is less than 2. Determine the transconductance of such a device.

18.For MOS devices with very short channel lengths, the square-law behavior is not valid, and we may instead write:

ID = W Cox(VGS , VTH)vsat;

(6.81)

where vsat is a relatively constant velocity. Determine the transconductance of such a device.

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	314 (1)

314

Chap. 6

Physics of MOS Transistors

2 V

2 V

0.5 V

M 1

M 1

M 1

0.5 V

0.5 V

1.5 V

0.5 V

1.5 V

0.5 V

(a)

(b)

(c)

0.5 V

0.5 V

1.5 V

M 1

1.5 V

M 1

M 1

0.5 V

0.5 V

(d)

(e)

(f)

0.5 V

M 1

M 1

M 1

1 V

0.5 V

0.5 V

(g)

(h)

(i)

Figure 6.38

19.Determine the region of operation of M1 in each of the circuits shown in Fig. 6.38.

20.Determine the region of operation of M1 in each of the circuits shown in Fig. 6.39.

M 1

M 1

1 V

1 V

(a)

(b)

1 V

M 1

1 V

M 1

0.2 V

0.2 V

0.2 V

0.7 V

(c)

(d)

Figure 6.39

21.Two current sources realized by identical MOSFETs (Fig. 6.40) match to within 1%, i.e.,

0:99ID2 < ID1 < 1:01ID2. If VDS1 = 0:5 V and VDS2 = 1 V, what is the maximum tolerable value of ?

22.Assume = 0, compute W=L of M1 in Fig. 6.41 such that the device operates at the edge of saturation.

23.Using the value of W=L found in Problem 22, explain what happens if the gate oxide thickness is doubled due to a manufacturing error.

24.In the Fig. 6.42, what is the minimum allowable value of VDD if M1 must not enter the

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	315 (1)

Sec. 6.7

Chapter Summary

315

I D1

I D2

Figure 6.40

VB

M 1

M 2

VDD = 1.8 V

R D 1 kΩ

M 1

1 V

Figure 6.41

VDD = 1.8 V

R D 500 Ω

W

10

M 1

=

1 V

L

0.18

Figure 6.42

triode region? Assume = 0.

25. In Fig. 6.43, derive a relationship among the circuit parameters that guarantees M1 operates

VDD

RD

M 1 W

L

Figure 6.43

at the edge of saturation. Assume = 0.

26.Compute the value of W=L for M1 in Fig. 6.44 for a bias current of I1. Assume = 0.

27.Calculate the bias current of M1 in Fig. 6.45 if = 0.

28.Sketch IX as a function of VX for the circuits shown in Fig. 6.46. Assume VX goes from 0 to VDD = 1:8 V. Also, = 0. Determine at what value of VX the device changes its region of operation.

29.Assuming W=L = 10=0:18 = 0:1 V,1, and VDD = 1:8 V, calculate the drain current of M1 in Fig. 6.47.

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	316 (1)

316

Chap. 6

Physics of MOS Transistors

VDD = 1.8 V

M 1

Figure 6.44

RS

VDD

RD

W

M 1

Figure 6.45

L

I X

I X

I X

VDD = 1.8 V

M 1

M 1

1 V

M 1

VX

M 1

VX

1 V

I X

VX

VX

(a)

(b)

(c)

(d)

Figure 6.46

VDD

1 kΩ

RD

Figure 6.47

M 1

30.In the circuit of Fig. 6.48, W=L = 20=0:18 and = 0:1 V,1. What value of VB places the transistor at the edge of saturation?

VDD = 1.8 V

R D 5 kΩ

M 1

VB

Figure 6.48

31.An NMOS device operating in saturation with = 0 must provide a transconductance of

1=(50 ).

(a)Determine W=L if ID = 0:5 mA.

(b)Determine W=L if VGS , VTH = 0:5 V.

(c)Determine ID if VGS , VTH = 0:5 V.

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	317 (1)

Sec. 6.7

Chapter Summary

317

32.Determine how the transconductance of a MOSFET (operating in saturation) changes if

(a)W=L is doubled but ID remains constant.

(b)VGS , VTH is doubled but ID remains constant.

(c)ID is doubled but W=L remains constant.

(d)ID is doubled but VGS , VTH remains constant.

33.If = 0:1 V,1 and W=L = 20=0:18, construct the small-signal model of each of the circuits shown in Fig. 6.49.

VDD = 1.8 V

VDD = 1.8 V

VDD = 1.8 V

R D

100 Ω

R D

5 kΩ

1 mA

1 V

M 1

M 1

M 1

(a)

(b)

(c)

VDD = 1.8 V

VDD = 1.8 V

M 1

M 1

2 kΩ

0.5 mA

(d)

(e)

Figure 6.49

34. The “intrinsic gain” of a MOSFET operating in saturation is defined as

gmrO. Derive an

expression for gmrO and plot the result as a function of ID. Assume VDS is constant.

35.Assuming a constant VDS, plot the intrinsic gain, gmrO, of a MOSFET

(a)as a function of VGS , VTH if ID is constant.

(b)as a function of ID if VGS , VTH is constant.

36.An NMOS device with = 0:1 V,1 must provide a gmrO of 20 with VDS = 1:5 V. Determine the required value of W=L if ID = 0:5 mA.

37.Repeat Problem 36 for = 0:2 V,1.

38.Construct the small-signal model of the circuits depicted in Fig. 6.50. Assume all transistors operate in saturation and =6 0.

39.Determine the region of operation of M1 in each circuit shown in Fig. 6.51.

40.Determine the region of operation of M1 in each circuit shown in Fig. 6.52.

41.If = 0, what value of W=L places M1 at the edge of saturation in Fig. 6.53?

42.With the value of W=L obtained in Problem 41, what happens if VB changes to +0:8 V?

43.If W=L = 10=0:18 and = 0, determine the operating point of M1 in each circuit depicted in Fig. 6.54.

44.Sketch IX as a function of VX for the circuits shown in Fig. 6.55. Assume VX goes from 0 to VDD = 1:8 V. Also, = 0. Determine at what value of VX the device changes its region of operation.

45.Construct the small-signal model of each circuit shown in Fig. 6.56 if all of the transistors operate in saturation and =6 0.

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	318 (1)

318				Chap. 6 Physics of MOS Transistors
	VDD		VDD		VDD
	RD		RD		RD
	Vout			Vout	Vout
	M 2	Vin	M 1	Vin	M 1
Vin		VB
	M 1		M 2		M 2
	(a)		(b)		(c)
		VDD		VDD
				RD
	Vin	M 1			Vout
		Vout		M 1
		M 2
			VB	Vin
				M 2
		(d)		(e)
Figure 6.50
M 1	2 V	M 1	0.3 V	M 1	1 V
				0.3 V	M 1
2 V		0.3 V			0.6 V
(a)		(b)		(c)	(d)

Figure 6.51

46.Consider the circuit depicted in Fig. 6.57, where M1 and M2 operate in saturation and exhibit channel-length modulation coefficients n and p, respectively.

(a)Construct the small-signal equivalent circuit and explain why M1 and M2 appear in “parallel.”

(b)Determine the small-signal voltage gain of the circuit.

SPICE Problems

In the following problems, use the MOS models and source/drain dimensions given in Appendix A. Assume the substrates of NMOS and PMOS devices are tied to ground and VDD, respectively.

47.For the circuit shown in Fig. 6.58, plot VX as a function of IX for 0 < IX < 3 mA. Explain the sharp change in VX as IX exceeds a certain value.

48.Plot the input/output characteristic of the stage shown in Fig. 6.59 for 0 < Vin < 1:8 V. At what value of Vin does the slope (gain) reach a maximum?

49.For the arrangements shown in Fig. 6.60, plot ID as a function of VX as VX varies from 0 to 1.8 V. Can we say these two arrangements are equivalent?

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	319 (1)

Sec. 6.7

Chapter Summary

319

M 1

M 1

1.5 V

0.9 V

0.9

0.5 V

(a)

(b)

M 1

M 1

0.9 V

0.4 V

1 V

0.4 V

0.9 V

Figure 6.52

(c)

(d)

VDD = 1.8 V

1 V

M 1

Figure 6.53

2 kΩ

VDD = 1.8 V

VDD = 1.8 V

VDD = 1.8 V

M 1

M 1

1 kΩ

500 Ω

1 kΩ

M 1

(a)

(b)

(c)

Figure 6.54

VDD = 1.8 V

VDD = 1.8 V

M 1

M 1

VX

I X

1 V

I X

VX

(a)

(b)

VDD = 1.8 V
M 1	I X
	VX
I X	M 1
VX
(c)	(d)

Figure 6.55

BR	Wiley/Razavi/Fundamentals of Microelectronics [Razavi.cls v. 2006]	June 30, 2007 at 13:42	320 (1)

320

Chap. 6

Physics of MOS Transistors

					Vin
	VDD		VDD		Vb	M 1
	RS	Vin	M 1
						Vout
Vin				Vout
	M 1		R			R1
	Vout			D
						M 2
	RD		M 2
						R D

(a)		(b)	(c)
	VDD		VDD
Vin	M 1		R2
			Vout
	Vout	Vin
			M 1
R1	RD		M 2
	M 2		R1
	(d)		(e)
Figure 6.56
		VDD
		M 2
	Vin	Vout
		M 1

Figure 6.57

		M 1
		2	VX	I X
	0.9 V	0.18

Figure 6.58

VDD = 1.8 V

500 Ω

M 1

Vout

Vin 10

0.18

Figure 6.59