56EMBEDDED CONTROLLER

Hardware Design

•ROM emulators (ROM ICE) that allow the designer to reduce the time it takes to edit-compile-load-debug programs by replacing the program EPROM with a RAM that can be loaded quickly and easily from the host computer.

•Simple tools, such as an LED or speaker can also be useful in debugging.

Hardware Development Tools

There are two general classes of hardware development tools available to the embedded developer: passive analysis tools that allow looking at the operation of the system, and active tools. Active tools allow the designer to intrude on the operation of the system while it’s running, even making changes to the system’s configuration and software while it is under test. The system under test is usually referred to as the “target” system, and the computer that is used to develop, edit, compile, assemble, and download the code to the target system is called the “host” system.

Hardware tools include logic probes to display static logic levels and detect pulses, oscilloscopes to look at signal waveform amplitude vs. time, logic analyzers (with processor specific probes), and PROM programmers.

Chapter Two Problems

1.Processors such as the 8031 use multiplexed address/data buses. They require more than one clock cycle to do a memory transfer because some or all of the bus lines are shared. 16-bit addresses alternate with 8-bit data. The ALE (address latch enable) signal indicates when address information (A0-7) is present on the multiplexed address/data bus. The ALE signal is used to latch the least significant eight bits of the address in an 8-bit register. A minimum of two clock cycles is required to transfer data: one for latching the address when ALE is high, and one for the actual data transfer. How many clock cycles (minimum) would be required if the processor was a 16-bit machine doing a 16-bit transfer? Would the address latch have to be different?

2.How many unique locations could be referenced as “address zero” in the 8031 CPU architecture? (Remember to consider all the address spaces!)

3.Most processor control lines are active low. Comment on the reasons for this.

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CHAPTER THREE	57

Worst-Case Timing, Loading,

Analysis, and Design

Just as in comedy, timing is essential to the success of a microcomputer design. Often it is quite possible to get one system functioning by just interconnecting the various components. But it is significantly more difficult to be able to guaran­ tee that many systems will work under the entire range of possible conditions that they may be exposed to. There are many designs in production right now that have a number of unidentified failures due to the lack of a worst-case analysis of the design. When timing or loading problems show up in a design, they usually appear as intermittent failures or as sensitivity to power supply fluctuations, temperature changes, and so on.

A worst-case design takes into account all available information regarding the components to be used with respect to variations in performance. Even when all parameters are at their most adverse values, the worst-case design can still be proved to meet the specifications. These variants may be due to changing manufacturing conditions, temperature, voltage, and other variables. Without performing a detailed analysis, there is no way of knowing if the design will work reliably under all operating conditions. It is much better to design reli­ ability and simplicity of manufacturing into a product using worst-case design rules than to attempt to correct a problem after the design has been implemented. With the emphasis that must be given to the quality of the final product, a designer is obligated to perform a detailed examination of the timing in a system. As is the case in most quality improvements, these efforts result in direct cost and saving time. This is clearly one of the places where the designer can have the greatest impact on overall product quality.