The i8255x Ethernet Driver

D.2 Build options

This section describes the build options for the i8255x driver:

•Statistics on page D-4

•Memory architecture on page D-4

•Other tuneable values on page D-5.

Note

ARM currently provides the i8255x driver in object form. Consequently, build options are not tuneable. Please refer to .../readme.txt to find out about the options used when building the i8255x drivers supplied with this release.

D.2.1 Statistics

You can include code in the build to gather statistics on Ethernet errors from the controller. The code also keeps totals of bytes transmitted, for example. This is controlled by the macro NET_STATS in ipport.h.

D.2.2 Memory architecture

The driver requires a pool of memory that is accessible by both the CPU and the

Ethernet controller. This must be uncached, unbuffered memory.

There are two architecture options available to the driver:

•shared packet

•private buffer.

The pre-processor macro USE_I8255X_SHARED_PACKETS selects between them.

If the shared packet architecture is in use (USE_I8255X_SHARED_PACKETS is defined in ipport.h), all of the large packets (bigbufsiz) on the IP stack must reside in an area of memory that can be accessed by both the Ethernet MAC attached to the PCI bus, and the processor. This memory must be uncached and unbuffered. The Ethernet MAC uses DMA to directly read or write the data in the packets buffer area. The advantage of the shared packet architecture is that data need not be copied into the IP stack buffers. The disadvantage is that the packet memory is uncached, and so all accesses to packet structures (for example, for checksum calculation) are external accesses.

If the private buffers architecture is in use (USE_I8255X_SHARED_PACKETS not defined), the Ethernet MAC has dedicated memory assigned to it for the transmit and receive buffer space, and data is copied in to or out of the packets on the IP stack using memcpy(). The dedicated memory must still be uncached and unbuffered, but the pool of packets on the IP stack can be fully cached.

D-4

Copyright © 1998-2001 ARM Limited. All rights reserved.

ARM DUI 0144B

The i8255x Ethernet Driver

As shipped, the driver can use either the 512KB of SSRAM on the Integrator/AP, at address 0x28000000, or the 256KB of unused core module SDRAM at 0x80000000. Uncomment either USE_I8255X_SDRAM or USE_I8255X_SSRAM in i8255x.h. If you are using a cached processor, ensure that the cacheable and bufferable bits are clear in the appropriate MMU descriptor or MPU register.

D.2.3 Other tuneable values

The other values you can change are:

MAX_I8255X

This sets the number of i8255x devices that can be supported by the driver. Each device configured requires a static data structure, so you adjust this value to reflect the actual number of devices in your system.

I8255X_TX_BUFFERS

This number governs the number of transmit descriptors and buffers used by the driver. Higher values allow higher performance, at a cost of using more memory.

I8255X_RX_BUFFERS

This number governs the number of receive descriptors and buffers used by the driver. If you are using the shared packet architecture, one bigbufsiz packet is pre-allocated per receive descriptor, so you must ensure that the system has more than I8255X_RX_BUFFERS bigbufsiz packets available. Higher values for I8255X_RX_BUFFERS allow higher performance and the lower possibility of having to drop incoming packets, but at a cost of using more memory.

ARM DUI 0144B

Copyright © 1998-2001 ARM Limited. All rights reserved.

D-5