Instruction Set

Branch and Exchange (BX)

This instruction is only executed if the condition is true. The various conditions are defined in Table 6.

This instruction performs a branch by copying the contents of a general register, Rn, into the program counter, PC. The branch causes a pipeline flush and refill from the address

Figure 11. Branch and Exchange Instructions

specified by Rn. This instruction also permits the instruction set to be exchanged. When the instruction is executed, the value of Rn[0] determines whether the instruction stream will be decoded as ARM or THUMB instructions.

31	28	27			24	23			20	19			16	15			12	11			8	7			4	3		0
Cond		0	0	0	1	0	0	1	0	1	1	1	1	1	1	1	1	1	1	1	1	0	0	0	1			Rn

Operand register

If bit 0 of Rn = 1, subsequent instructions decoded as THUMB instructions

If bit 0 of Rn = 0, subsequent instructions decoded as ARM instructions

Condition Field

Instruction cycle times

The BX instruction takes 2S + 1N cycles to execute, where S and N are as defined in Cycle Types.

Assembler syntax

BX - branch and exchange.

{cond}: Two character condition mnemonic. See Table 6.

Rn: is an expression evaluating to a valid register number.

Using R15 as an operand

If R15 is used as an operand, the behaviour is undefined.

BX{cond} Rn

Examples

ADR R0, Into_THUMB + 1; Generate branch target address

	; and set bit 0 high - hence
	; arrive in THUMB state.
BX R0	; Branch and change to THUMB
	; state.
CODE16	; Assemble subsequent code as
Into_THUMB	; THUMB instructions

.

.

ADR R5, Back_to_ARM: Generate branch target to word : aligned ; address - hence bit 0

	; is low and so change back to ARM
	; state.
BX R5	; Branch and change back to ARM
	; state.
.
.
ALIGN	; Word align
CODE32	; Assemble subsequent code as ARM
Back_to_ARM	; instructions
.
.

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