Vankka J. - Digital Synthesizers and Transmitters for Software Radio (2000)(en)
.pdfList of Abbreviations
ACI |
Adjacent channel interference |
ACLR |
Adjacent channel leakage power ratio |
ACP |
First adjacent channel power |
ADC |
Analog-digital-converter |
ALT1 |
Second adjacent channel power |
ALT2 |
Third adjacent channel power |
AM-AM |
Amplitude-dependent amplitude distortion |
AM-PM |
Amplitude-dependent phase distortion |
ASIC |
Application specific integrated circuit |
BiCMOS |
Bipolar complementary metal-oxide-semiconductor |
BPF |
Bandpass filter |
CALLUM |
Combined analogue locked loop universal modula- |
tor |
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CATV |
Cable Television |
CDMA |
Code division multiple access |
CF |
Crest factor |
CFBM |
Cartesian feedback module |
CIA |
Carry increment adder |
CIC |
Cascaded-integrator-comb |
CICC |
Custom integrated circuits conference |
CLK |
Clock |
CMOS |
Complementary metal-oxide-semiconductor |
xxiv |
Abbreviations |
CORDIC |
Co-ordinate digital computer |
CP |
Carry Propagation |
CS |
Carry Save |
CSD |
Canonic signed digit |
CSFR |
Constant scale factor redundant |
D/A |
Digital to analog |
DAC |
Digital to analog converter |
DAMPS |
Digital-advanced mobile phone service |
dB |
Decibel |
dBc |
Decibels below carrier |
dBFS |
Decibels below full-scale |
DCORDIC |
Differential CORDIC |
DCT |
Discrete cosine transform |
DDFS |
Direct digital frequency synthesizer |
DDS |
Direct digital synthesizer |
DECT |
Digital enhanced cordless telecommunications |
DEMUX |
Demultiplexer |
DFF |
Delay-flip-flop |
DFT |
Discrete Fourier transform |
DNL |
Differential non-linearity |
DPLL |
Digital phase locked loop |
DRC |
Design rule check |
DSP |
Digital signal processing |
EDGE |
Enhanced data rates for global evolution |
EER |
Envelope elimination and restoration |
EF |
Error feedback |
ETSI |
European telecommunications standards institute |
EVM |
Error vector magnitude |
FET |
Field-effect transistors |
FFT |
Fast Fourier transform |
FIR |
Finite impulse response |
FPGA |
Field programmable gate array |
GCD |
Greatest common divisor |
GMSK |
Gaussian minimum shift keying |
Abbreviations |
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GPRS |
General packet radio service |
GSM |
Groupe spécial mobile |
HPF |
High-pass filter |
HSCSD |
High-speed circuit switched data |
IC |
Integrated circuit |
IDFT |
Inverse discrete Fourier transform |
IEE |
Institution of electrical engineers |
IEEE |
Institute of electrical and electronics engineers |
IEICE |
Institute of electronics, information and communica- |
tion engineers |
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IF |
Intermediate frequency |
IIR |
Infinite impulse response |
IMD |
Inter-modulation distortion |
INL |
Integral non-linearity |
ISI |
Inter-symbol interference |
ISM |
Industrial, scientific and medicine |
ISSCC |
International solid-state circuits conference |
LE |
Logic element |
L-FF |
Logic-flip-flop |
LINC |
Linear amplification with nonlinear components |
LIST |
Linear amplification employing sampling tech- |
niques |
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LMS |
Least-mean-square |
LMS |
Least mean squares algorithm |
LO |
Local oscillator |
LPF |
Low-pass filter |
LSB |
Least significant bit |
LTI |
Linear time invariant |
LUT |
Look-up table |
LVS |
Layout versus schematic |
MAE |
Maximum amplitude error |
MSB |
Most significant bit |
MSD |
Most significant digits |
MUX |
Multiplexer |
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Abbreviations |
NCO |
Numerically controlled oscillator |
NEG |
Negator |
NRZ |
Non-return-to-zero |
NTF |
Noise transfer |
OSC |
Oscillator |
P/I |
Pipelining/interleaving |
PA |
Power amplifier |
PAR |
Peak to average ratio |
PCDE |
Peak code domain error |
PFD |
Phase/frequency detector |
PLD |
Programmable logic device |
PLL |
Phase-locked loop |
PPM |
Part per million |
PSK |
Phase shift keying |
QAM |
Quadrature amplitude modulation |
QDDS |
Quadrature direct digital synthesizer |
QM |
Quadrature modulator |
QMC |
Quadrature modulator compensator |
QPSK |
Quadrature phase-shift keying |
R/P |
Rectangular-to-polar |
RF |
Radio frequency |
RLS |
Recursive least squares algorithm |
RLS |
Recursive least squares |
RMS |
Root-mean-square |
RNS |
Residue number system |
ROM |
Read-only memory |
RTL |
Register transfer level |
RZ |
Return-to-zero |
RZ2 |
Double RZ |
RZ2c |
Double complementary |
SFDR |
Spurious free dynamic range |
SIR |
Signal-to-interference ratio |
SMS |
Short message services |
SNDR |
Signal to noise and distortion ratio |
Abbreviations |
xxvii |
SNR |
Signal-to-noise ratio |
TDD |
Time division duplex |
TDD-WCDMA |
Time division duplex WCDMA |
TDMA |
Time division multiple access |
TEKES |
Technology development center |
VCO |
Voltage controlled oscillator |
VHDL |
Very high speed integrated circuit HDL |
VHF |
Very high frequency |
VLSI |
Very large scale integration |
VMCD |
Voltage Mode Class-D |
WCDMA |
Wideband code division multiple access |
XOR |
Exclusive or |
∆¦ |
Delta sigma |
Chapter 1
1. TRANSMITTERS
This chapter provides a basic introduction to transmitter architectures. The classic transmitter architecture is based upon linear power amplifiers and power combiners. Most recently, transmitters have been based upon a variety of different architectures including Envelope Elimination and Restoration (EER), polar loop, LInear amplification with Nonlinear Components (LINC), Combined Analogue Locked Loop Universal Modulator (CALLUM), LInear amplification employing Sampling Techniques (LIST) and transmitters based on bandpass sigma delta modulators.
1.1 Direct Conversion Transmitters
The principle of the direct conversion transmitter is presented in Figure 1-1 In direct conversion transmitters, the band limited baseband signals are converted directly up to the radio frequency with in-phase and quadrature carriers. The band-pass filter after the signal summation is used to suppress the
I(n)
D/A
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Figure 1-1 Direct conversion transmitter.
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Chapter 1 |
out of band signals generated by the harmonic distortion of the carrier. The direct conversion transmitter is theoretically simple (no IF components) and potentially suitable for high integration level solutions. The drawbacks are: an I,Q mixer is needed at RF frequency, there is LO-leakage at RF frequency (filtering impossible) and VCO pulling.
The image rejection is given by
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where ∆G is the gain mismatch and ∆θ is the phase mismatch. For instance, with a 5 degree phase mismatch and 0.1 dB amplitude mismatch, the maximum achievable single sideband suppression is only 27.2 dB, as shown in Figure 1-2.
The strong signal at the output of the power amplifier may couple to the local oscillator (LO), which is usually a voltage controlled oscillator, causing the phenomenon known as injection pulling [Raz98]. This means that the frequency of the local oscillator is pulled away from the desired value. The severity of the injection pulling is proportional to the difference between the frequency of the local oscillator and the frequencies at the output of the PA. By taking advantage of this, the problem of injection pulling can be alleviated by using an offset LO direct-conversion structure. In this structure, the carrier signal is formed by mixing two lower frequency signals. An additional band-pass filter is needed to filter away the undesired carrier at frequency. Another solution is to generate the LO signal from a lower frequency VCO by the frequency multiplication or from higher frequency VCO by frequency division. The VCO frequency is harmonically dependent on the
Phase Error [ ]
Image Rejection Ratio
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30 dBc |
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Figure 1-2 Image-Rejection ratio.
Transmitters |
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LO signal; the pulling rejection is not, therefore, as advantageous as in the offset VCO. Reported direct conversion transmitters using CMOS are, for example, [Ors99], [Lee01], [Ger01], and [Liu00]. The benefits and drawbacks of using direct conversion architecture in a transmitter are heavily dependent on the particular case, i.e. on application area, modulation method and technologies.
1.2 Dual-Conversion Transmitter
The injection pulling can also be avoided by using a dual conversion transmitter presented in Figure 1-3. In this structure, the baseband data is first upconverted to the intermediate frequency and then to the desired radio frequency. The dual conversion transmitter has advantages. First, the quadrature modulation is performed at the fixed lower frequency leading to the better matching between I and Q. Second, the additional attenuation of the adjacent channel spurs and noise may be achieved by using a band-pass filter at the IF. The hardware can be partly shared with the receiver (same oscillator frequencies). The drawbacks are complexity (more components), lower integration level, impedance matching required for external components and more power consumption. The stopband attenuation of the image reject filter at the RF frequency has hard requirements due to high frequency and the high attenuation factor because the signal component at the image frequency has the same power as the desired sideband. The first analog IF mixer stage of the transmitter in Figure 1-3 can be replaced with a digital quadrature modulator as shown in Figure 15-1.
1.3 Transmitters Based on VCO modulation
The constant envelope modulator can simply be implemented by direct modulation of a voltage controlled oscillator (VCO) [Bax99]. Ideally the VCO output frequency can be expressed as
Q(t)
90°
IF filter |
image reject |
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I(t)
Figure 1-3 Dual conversion transmitter.
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Chapter 1 |
fout fo + Kv Vtune |
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where f is the base output frequency of the VCO, Kv is the VCO sensitivity in Hz/V and Vtune is the input voltage that tunes the VCO. In principle, this produces a FM signal proportional to the modulating signal. There are many disadvantages, however, to this approach:
*Frequency drift: change in the VCO frequency due to tuning voltage
drift
*Frequency pushing: change in the VCO frequency due to change in the power supply voltage
*Load pulling: change in the VCO frequency due to change in the VCO
load
The change in VCO frequency can be compensated so that the receiving radio end tells the error to the transmitting radio, which tunes the modulating signal ( Vtune ) in order to compensate changes in the tuning slope. In wireless communication systems using time division multiple access (TDMA), such as DECT, data is transmitted in bursts with inactive periods in-between. Figure 1-4 presents a DECT architecture that utilizes these inactive periods between bursts to force the VCO frequency to match the desired channel frequency by a closed PLL [Bax99]. During transmit bursts the PLL loop is open and the incoming data modulates the VCO. Since the transmit burst duration is short (< 500 s) in DECT and the requirements on the frequency error are not very tight (<50 kHz) [Bax99], the frequency drift in the VCO during the burst can be made so low that it is tolerable. Frequency pushing caused by the switching and power ramping of the power amplifier (PA) is also a problem. Another more severe problem is frequency pulling caused by changes in the input impedance of the PA when it is switched or ramped. While these problems can be overcome in the DECT system, they render direct modulation unsuitable for standards that have strict frequency control
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LOOP |
VCO |
RF |
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n/n+1
channel
Figure 1-4 VCO modulator architecture.
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specifications, such as GSM [Bax99].
In an indirect modulation scheme, the problems of VCO drift and instability are overcome by digitally modulating a synthesizer rather than directly modulating a VCO as in a simple direct modulator. In indirect modulation, the modulating signal is injected while the PLL is closed [Bax99], this makes it possible to constantly maintain accurate frequency control. An indirect modulator architecture is illustrated in Figure 1-5 [Ril94], [Per97], [Bax01], and [McM02]. The architecture comprises an FIR filter and a frequency synthesizer. The FIR filter filters the data bits. It consists of an oversampling counter, a ROM look-up-table and a small amount of random logic. The FIR filter taps stored in the ROM are quantised to single-bit. A reference frequency f is needed to phase-lock the VCO to a stable source. The delta-sigma modulator (∆Σ) and dual modulus divider comprise a frac- tional-N frequency synthesizer. The key feature of this synthesizer approach is that it uses a digital ∆Σ to generate a bit stream b(n), which embodies the higher resolution of the k-bit input within the long term average of b(n). By making the k-bit input to the ∆Σ a function of time, the instantaneous frequency can be directly manipulated.
The advantage of this technique is both that no mixers are needed to upconvert the modulating signal to the carrier frequency and that the RF signal is inherently band-limited to suppress noise. The disadvantage of this technique is that the modulation bandwidth must be less than the synthesizer bandwidth to avoid any loop suppression of the modulating signal. Since the synthesizer closed-loop bandwidth is usually narrow in order to suppress the quantization noise of the ∆Σ modulator, the maximum bandwidth is limited. This problem, however, can be tackled by equalizing the signal entering the
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VCO |
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Oversampling |
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∆Σ |
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b(n) |
Frequency |
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Delta Sigma |
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Modulator |
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Filter
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channel |
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Figure 1-5 Indirect GMSK modulator with ∆Σ−fractional-N-synthesizer.