Introduction

1.1About the ARM PrimeCell Audio CODEC Interface (PL040)

The ARM PrimeCell Audio CODEC Interface (ACI) is an Advanced Microcontroller Bus Architecture (AMBA) compliant System-on-a-Chip peripheral that is developed, tested and licensed by ARM.

The PrimeCell ACI is an AMBA slave block, and connects to the Advanced Peripheral Bus (APB). The PrimeCell ACI provides a digital serial interface to an off-chip 8-bit Pulse Code Modulation (PCM) CODEC. It provides all the necessary clocks and timing pulses to perform serialization or deserialization of the data stream to or from the CODEC device.

The features of the PrimeCell ACI are covered under the following headings:

•Features of the PrimeCell ACI

•An example CODEC interface.

1.1.1Features of the PrimeCell ACI

The PrimeCell ACI has the following features:

•compliance to the AMBA Specification (Rev 2.0) onwards for easy integration into System-on-a-Chip (SoC) implementation

•transmit and receive 16-byte FIFOs to reduce CPU interrupts

•programmable frequency divider allows division of the input clock ( ACICLK) by 2 to 1024 to generate an output bit clock (ACIBITCLK)

•synchronous communication interface to off-chip CODEC device

•transmit FIFO and receive FIFO level interrupts independently maskable.

•8-bit serial data interface

•single combined interrupt output also provided.

The frame synchronization pulse (ACIFSYNC) frequency is fixed at 1/8th of the output bit clock (ACIBITCLK) frequency.

Additional test registers and modes are implemented for functional verification and manufacturing test.

Figure 1-1 on page 1-3 shows a block diagram of the PrimeCell ACI.

1-2

© Copyright ARM Limited 1999. All rights reserved.

ARM DDI 0146C

Introduction

ACICLK

BnRES
PCLK
PSEL	AMBA
PENABLE	APB
PWRITE	interface
	and
PADDR[7:2]	register block
PWDATA[7:0]
PRDATA[7:0]
ACIRXINTR
ACIINTR
ACITXINTR
nACIRST
SCANMODE

		Frequency	ACIBITCLK
		divider
	Receive	Receive	ACIDATAIN
		shift
	FIFO
		register
	Interrupts	Bit	ACIFSYNC
	and FIFO
		counter
	level status
	Transmit	Transmit	ACIDATAOUT
		shift
	FIFO
		register

Figure 1-1 PrimeCell ACI block diagram

ARM DDI 0146C

© Copyright ARM Limited 1999. All rights reserved.

1-3

Introduction

1.1.2An example CODEC interface

The PrimeCell ACI could be used to implement a CODEC interface to an external 8-bit single channel CODEC IC, such as the OKI MSM7702-01/02/03. This low-power, single rail device for voice signals from 300 to 3400Hz uses ITU-T A/μ-law companding. This requires a frame synchronization frequency of 8kHz +/- 50ppm (to guarantee AC specifications) and the data rate will be 64kHz, which is equal to the output bit clock, ACIBITCLK.

1-4

© Copyright ARM Limited 1999. All rights reserved.

ARM DDI 0146C