Chapter 2

Functional Overview

This chapter describes the major functional blocks of the ARM PrimeCell Audio CODEC Interface (PL040) and contains the following:

•ARM PrimeCell Audio CODEC Interface (PL040) overview on page 2-2

•PrimeCell ACI functional description on page 2-3

•PrimeCell ACI operation on page 2-7.

ARM DDI 0146C

© Copyright ARM Limited 1999. All rights reserved.

2-1

Functional Overview

2.1ARM PrimeCell Audio CODEC Interface (PL040) overview

The PrimeCell ACI provides:

•a digital serial interface to an off-chip 8-bit PCM CODEC

•all the necessary clocks and timing pulses to perform serialization or deserialization of the data stream to or from the CODEC device.

Data and control/status information are written and read by the CPU via the AMBA APB interface. The interface supports full duplex operation and the transmit and receive paths are buffered with internal FIFO memories allowing up to 16 bytes to be stored independently in both transmit and receive modes.

The PrimeCell ACI includes a programmable frequency divider that generates a common transmit and receive bit clock output from the on-chip ACI clock input (ACICLK). Transmit data values are output synchronous with the rising edge of the bit clock output. Receive data values are sampled on the falling edge of the bit clock output. The start of a data frame is indicated by a synchronization output signal that is synchronous with the bit clock.

The PrimeCell ACI can generate:

•individual transmit and receive interrupts

•a single combined interrupt that is asserted if any of the individual interrupts are asserted and unmasked.

2-2

© Copyright ARM Limited 1999. All rights reserved.

ARM DDI 0146C