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XST General Constraints

Use Synthesis Constraints File Syntax Examples

Following are syntax examples using Use Synthesis Constraints File with particular tools or methods. If a tool or method is not listed, Use Synthesis Constraints File may not be used with it.

Use Synthesis Constraints File XST Command Line Syntax Example

Define Use Synthesis Constraints File globally with the -iuc command line option of the run command:

-iuc {yes|no}

The default is no.

Use Synthesis Constraints File Project Navigator Syntax Example

Define Use Synthesis Constraints File globally in Project Navigator > Process Properties > Synthesis Options > Use Synthesis Constraints File.

Verilog Include Directories (–vlgincdir)

The Verilog Include Directories (-vlgincdir)switch is used to help the parser find files referenced by `include statements. When an `include statement references a file, XST looks in different areas in this order:

Relative to the current directory.

Relative to the inc directories.

Relative to the current file.

Note: -vlgincdir should be used in conjunction with `include.

Verilog Include Directories Architecture Support

Verilog Include Directories is architecture independent.

Verilog Include Directories Applicable Elements

Verilog Include Directories applies to directories.

Verilog Include Directories Propagation Rules

Not applicable

Verilog Include Directories Syntax Examples

Following are syntax examples using Verilog Include Directories with particular tools or methods. If a tool or method is not listed, Verilog Include Directories may not be used with it.

Verilog Include Directories XST Command Line Syntax Example

Define Verilog Include Directories globally with the –vlgincdir command line option of the run command: Allowed values are names of directories. For more information, see “Names With Spaces in Command Line Mode.”

-vlgincdir {directory_path [directory_path]}

There is no default.

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Verilog Include Directories Project Navigator Syntax Example

Define Verilog Include Directories globally in Project Navigator > Process

Properties > Synthesis Options > Verilog Include Directories.

Allowed values are names of directories. There is no default.

To view Verilog Include Directories, select Edit > Preferences > Processes > Property Display Level > Advanced.

Verilog 2001 (–verilog2001)

Verilog 2001 (-verilog2001) enables or disables interpreted Verilog source code as the Verilog 2001 standard. By default Verilog source code is interpreted as the Verilog 2001 standard.

Verilog 2001 Architecture Support

Verilog 2001 (-verilog2001) is architecture independent.

Verilog 2001 Applicable Elements

Verilog 2001 applies to syntax.

Verilog 2001 Propagation Rules

Not applicable

Verilog 2001 Syntax Examples

Following are syntax examples using Verilog 2001 with particular tools or methods. If a tool or method is not listed, Verilog 2001may not be used with it.

Verilog 2001 XST Command Line Syntax Example

Define Verilog 2001globally with the –verilog2001 command line option of the run command:

-verilog2001 {yes|no}

The default is yes.

Verilog 2001 Project Navigator Syntax Example

Define Verilog 2001 globally in Project Navigator > Process Properties >

Synthesis Options > Verilog 2001.

HDL Library Mapping File (–xsthdpini)

Use HDL Library Mapping File (-xsthdpini) to define the library mapping.

The library mapping file has two associated parameters:

XSTHDPINI

XSTHDPDIR

The library mapping file contains:

The library name

The directory in which the library is compiled

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XST General Constraints

XST maintains two library mapping files:

The pre-installed file, which is installed during the Xilinx software installation

The user file, which you may define for your own projects

The pre-installed (default) INI file is named xhdp.ini, and is located

in %XILINX%\vhdl\xst. These files contain information about the locations of the standard VHDL and UNISIM libraries. These should not be modified, but the syntax can be used for user library mapping. This file appears as follows:

-- Default lib mapping for XST

std=$XILINX/vhdl/xst/std

ieee=$XILINX/vhdl/xst/unisim

unisim=$XILINX/vhdl/xst/unisim

aim=$XILINX/vhdl/xst/aim

pls=$XILINX/vhdl/xst/pls

Use this file format to define where each of your own libraries must be placed. By default, all compiled VHDL flies are stored in the xst sub-directory of the ISE™ project directory.

To place your custom INI file anywhere on a disk:

Select the VHDL INI file in Project Navigator > Process Properties > Synthesis Options, or

Set up the -xsthdpini parameter, using the following command in stand-alone mode:

set -xsthdpini file_name

You can give this library mapping file any name you wish, but it is best to keep the .ini classification. The format is:

library_name=path_to_compiled_directory

Use double dash (--) for comments.

MY.INI Example Text

work1=H:\Users\conf\my_lib\work1

work2=C:\mylib\work2

HDL Library Mapping File Architecture Support

HDL Library Mapping File is architecture independent.

HDL Library Mapping File Applicable Elements

HDL Library Mapping File applies to files.

HDL Library Mapping File Propagation Rules

Not applicable

HDL Library Mapping File Syntax Examples

Following are syntax examples using HDL Library Mapping File with particular tools or methods. If a tool or method is not listed, HDL Library Mapping File may not be used with it.

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HDL Library Mapping File XST Command Line Syntax Example

Define HDL Library Mapping File globally with the set -xsthdpini command line option before running the run command:

set -xsthdpini file_name

The command can accept a single file only.

HDL Library Mapping File Project Navigator Syntax Example

Define HDL Library Mapping File globally in Project Navigator > Process

Properties > Synthesis Options > VHDL INI File.

To view HDL Library Mapping File, select Edit > Preferences > Processes > Property Display Level > Advanced.

Work Directory (–xsthdpdir)

Work Directory (-xsthdpdir) defines the location in which VHDL-compiled files must be placed if the location is not defined by library mapping files. To access Work Directory:

• Select Project Navigator > Process Properties > Synthesis Options

> VHDL Working Directory, or

Use the following command in stand-alone mode:

set -xsthdpdir directory

Work Directory Example

Assume the following for purposes of this example:

Three different users are working on the same project.

They share one standard, pre-compiled library, shlib.

This library contains specific macro blocks for their project.

Each user also maintains a local work library.

User 3 places her local work library outside the project directory (for example, in c:\temp).

Users 1 and 2 share another library (lib12) between them, but not with User 3.

The settings required for the three users are as follows:

Work Directory Example User One

Mapping file:

schlib=z:\sharedlibs\shlib

lib12=z:\userlibs\lib12

Work Directory Example User Two

Mapping file:

schlib=z:\sharedlibs\shlib

lib12=z:\userlibs\lib12

Work Directory Example User Three

Mapping file:

schlib=z:\sharedlibs\shlib

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