78 4 Word-Length Optimization

one or two zero-input impulse induced limit cycle behaviour. When both implementation structures exhibit limit cycle behaviour, the multiple wordlength limit cycles tend, on average, to have very slightly lower power than the equivalent optimum uniform word-length implementation. These should not be surprising results, since it is feedback loops that are often the most sensitive to the truncation error modelled in Section 4.1.2. Therefore multiple word-length optimizations will generally prefer to reduce word-lengths in other locations than those around such sensitive loops, which are also the cause of limit cycle behaviour.

4.7 Summary

This chapter has introduced several methods for automating the design of bit-parallel multiple word-length implementations of DSP systems. A lossy synthesis approach has been described, based on optimizing the area consumption of the resulting implementation, subject to constraints on the finite precision errors.

Two special cases have been dealt with in detail: linear time-invariant systems, and nonlinear systems containing only di erentiable nonlinearities. Two optimization methods have been proposed: an application specific heuristic, and an optimum approach based on integer linear programming.

It has been demonstrated that the multiple word-length design paradigm allows a broad design space to be searched by the synthesis tools, leading to high quality results.

In this chapter, system area estimation was performed using the assumption of a dedicated resource binding. However the synthesis of large systems may not be possible using this design methodology. It is often necessary to trade o the number of signal samples processed per clock period against system area through the use of operation scheduling and binding techniques. Chapter 6 addresses these problems for the case of multiple word-length systems.