Timer

4.3Timer Register Descriptions

4.3.1Load Register

Read/write. The Load register contains the initial value of the timer and is also used as the reload value in periodic timer mode. When writing to this register the top 16 bits should be written as 0 and when reading the top 16 bits will be undefined.

4.3.2Value

Read only. The Value location gives the current value of the timer. When reading this location the top 16 bits are read as undefined.

4.3.3Clear

Write only. Writing to the Clear location clears an interrupt generated by the counter timer.

4.3.4Control Register

Read/Write. The Control register provides enable/disable, mode and pre-scale configurations for the timer.

Figure 4-3: Timer Register Bit Positions and Table 4-1: Bits 3 – 2: Prescale bitsbelow define the operation of the Control register.

31	8	7		6		5	4	3		2	1	0
0		Ena-		Mode		0	0		Pre-scale		0	0
		ble
								Figure 4-3: Timer Register Bit Positions
	Bit 7 – Enable Bit						0—Timer Disabled
							1—Timer Enabled
	Bit 6 – Mode Bit						0—Free-running Model
							1—Periodic Timer Model
	Bits 3 – 2: Pre-scale Bits						See Table 4-1: Bits 3 – 2: Prescale bitson
							page 4-6

		Reference Peripherals Specification	4-5
		ARM DDI 0062D

Open Access