STANDARD AND PTS INTERRUPTS
Table 5-11. A/D Scan Mode PTSCB (Example 2)
Unused
Unused
PTSPTR2 (HI) = 1FH
PTSPTR2 (LO) = AAH
PTSPTR1 (HI) = 30H
PTSPTR1 (LO) = 00H
PTSCON = C3H (Mode = 110, UPDT = 0)
PTSCOUNT = 0AH
Software starts a conversion on channel x. When the conversion is finished and the A/D conversion complete interrupt is generated, the A/D scan mode routine begins. The PTS reads the command in location 3000H and stores it in a temporary location. Then it increments PTSPTR1 twice and stores the value of the AD_RESULT register in location 3002H. The final step is to copy the conversion command from the temporary location to the AD_COMMAND register. The CPU could process or move the conversion results data from the table before the next conversion completes and a new PTS cycle begins. When the next cycle begins, PTSPTR1 again points to 3000H and the repeats the events of the first cycle. The value of the AD_RESULT register is written to location 3002H and the command at location 3000H is re-executed.
5.6.6PWM Modes
The PWM toggle and PWM remap modes are designed for use with the event processor array (EPA) to generate pulse-width modulated (PWM) output signals. These modes can also be used with an interrupt signal from any other source. The PWM toggle mode uses a single EPA channel to generate a PWM signal. The PWM remap mode uses two EPA channels, but it can generate signals with duty cycles closer to 0% or 100% than are possible with the PWM toggle mode. Table 5-12 compares the two PWM modes. For code examples, see AP-445, 8XC196KR Peripherals: A User’s Point of View and “EPA PWM Output Program” on page 10-35.
Table 5-12. Comparison of PWM Modes
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PWM Toggle Mode |
PWM Remap Mode |
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Reads the location specified by PTSPTR1 |
Reads the location specified by PTSPTR1 |
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(usually EPAx_TIME). |
(usually EPAx_TIME). |
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Adds one of two values to the location specified by |
Adds the value in PTSCONST1 to the location |
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PTSPTR1. If TBIT is clear, it adds the value in |
specified by PTSPTR1. |
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PTSCONST1. If TBIT is set, it adds the value in |
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PTSCONST2. |
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Stores the sum back into the location specified by |
Stores the sum back into the location specified by |
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PTSPTR1. |
PTSPTR1. |
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Toggles TBIT. |
Toggles the unused TBIT. |
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5-31 |
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8XC196Kx, Jx, CA USER’S MANUAL
Figure 5-15 illustrates a generic PWM waveform. The time the output is “on” is T1; the time the output is “off” is T2 – T1. The formulas for frequency and duty cycle are shown below. In most applications, the frequency is held constant and the duty cycle is varied to change the average value of the waveform.
1 Frequency, in Hertz = ------
T2
T1
Duty Cycle = ------ × 100%
T2
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off |
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off |
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T1 |
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T2 + T1 |
Time, t |
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On-time = T1 |
Off-time = T2 - T1 |
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A0263-02
Figure 5-15. A Generic PWM Waveform
The PWM modes do not use a PTSCOUNT register to specify the number of consecutive PTS cycles. To stop producing the PWM output, clear the PTSSEL.x bit to disable PTS service for the interrupt and reconfigure the EPA channel in the interrupt service routine.
5.6.6.1PWM Toggle Mode Example
Figure 5-16 shows the PTS control block for PWM toggle mode. To generate a PWM waveform using PWM toggle mode and EPA0, complete the following procedure. This example uses the values stored in CSTORE1 and CSTORE2 to control the frequency and duty cycle of a PWM.
1.Disable the interrupts and the PTS. The DI instruction disables all standard interrupts; the DPTS instruction disables the PTS.
2.Store the on-time (T1) in CSTORE1.
3.Store the off-time (T2 – T1) in CSTORE2.
5-32
STANDARD AND PTS INTERRUPTS
4.Set up the PTSCB as shown in Table 5-13:
—Load PTSCON with 43H (selects PWM toggle mode, initial TBIT value = 1)
—Set up PTSPTR1 to point to EPA0_TIME (the EPA0 event-time register)
—Load PTSCONST1 with the on-time (T1) from CSTORE1.
—Load PTSCONST2 with the off-time (T2 – T1) from CSTORE2.
5.Configure P1.0 to serve as the EPA0 output:
—Clear P1_DIR.0 (selects output)
—Set P1_MODE.0 (selects the EPA0 special-function signal)
—Set P1_REG.0 (initializes the output to “1”)
6.Set up EPA0:
—Load EPA0_CON with 0078H (timer 1, compare, toggle output pin, re-enable)
—Load EPA0_TIME with the value in PTSCONST1 (selects T1 as first event time)
—Load T1CONTROL with C2H (enables timer 1, selects up counting at F OSC/4, and enables the divide-by-four prescaler)
7.Enable the EPA0 interrupt and select PTS service for it:
—Set INT_MASK.4
—Set PTSSEL.4
8.Enable the interrupts and the PTS. The EI instruction enables interrupts; the EPTS instruction enables the PTS.
Table 5-13. PWM Toggle Mode PTSCB
PTSCONST2 (HI) = T2 – T1 (HI)
PTSCONST2 (LO) = T2 – T1 (LO)
PTSCONST1 (HI) = T1 (HI)
PTSCONST1 (LO) = T1 (LO)
PTSPTR1 (HI) = 1FH
PTSPTR1 (LO) = 62H
PTSCON = 43H (Mode = 010, TMOD = 1, TBIT = 1)
Unused
5-33
8XC196Kx, Jx, CA USER’S MANUAL
PTS PWM Toggle Mode Control Block
In PWM toggle mode, the PTS uses a single EPA channel to generate a pulse-width modulated (PWM) output signal. The control block contains registers that contain the PWM on-time (PTSCONST1), the PWM off-time (PTSCONST2), the address pointer (PTSPTR1), and a control register (PTSCON).
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PTSCONST2 (H) |
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PTSCONST2 (L) |
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PTSCONST1 (H) |
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PWM On-time (high byte) |
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PTSCONST1 (L) |
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PWM On-time (low byte) |
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PTSPTR1 (H) |
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Pointer 1 Value (high byte) |
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PTSPTR1 (L) |
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Pointer 1 Value (low byte) |
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PTSCON |
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M2 |
M1 |
M0 |
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TMOD |
TBIT |
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PTSCONST2 |
PTSCB + 6 |
PWM Off-time |
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PTSCONST1 |
PTSCB + 4 |
PWM On-time |
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Write the desired PWM on-time to these bits. |
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PTSPTR1 |
PTSCB + 2 |
Pointer 1 Value |
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Figure 5-16. PTS Control Block – PWM Toggle Mode
5-34
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STANDARD AND PTS INTERRUPTS |
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PTS PWM Toggle Mode Control Block (Continued) |
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PTSCON |
PTSCB + 1 |
PTS Control Bits |
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M2:0 |
PTS Mode |
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M2 |
M1 |
M0 |
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PWM |
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TMOD |
Toggle Mode Select |
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= PWM toggle mode |
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Toggle Bit Initial Value |
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Determines the initial value of TBIT. |
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= selects initial value as zero |
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= selects initial value as one |
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The TBIT value determines whether PTSCONST1 or |
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= PTSCONST1 is added to PTSPTR1 |
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= PTSCONST2 is added to PTSPTR1 |
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Reading this bit returns the current value of TBIT, which is |
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toggled by hardware at the end of each PWM toggle cycle. |
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Figure 5-16. PTS Control Block – PWM Toggle Mode (Continued)
Figure 5-17 is a flow diagram of the EPA and PTS operations for this example. Operation begins when the timer is enabled (at t = 0 in Figure 5-15 on page 5-32) by the write to T1CONTROL. The first timer match occurs at t = T1. The EPA toggles the output pin to zero and generates an interrupt to initiate the first PTS cycle.
PWM Toggle Cycle 1. Because TBIT is initialized to one, the PTS adds the off-time (T2 – T1) to EPA0_TIME and toggles TBIT to zero.
The second timer match occurs at t = T2 (the end of one complete PWM pulse). The EPA toggles the output to one and generates an interrupt to initiate the second PTS cycle.
PWM Toggle Cycle 2. Because TBIT is zero, the PTS adds the on-time (T1) to EPA0_TIME and toggles the TBIT to one.
The next timer match occurs at t = T2 + T1. The EPA toggles the output to zero and initiates the third PTS cycle. The PTS actions are the same as in cycle 1, and generation of the PWM output continues with PTS cycle 1 and cycle 2 alternating.
5-35
8XC196Kx, Jx, CA USER’S MANUAL |
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Start |
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EPA |
No |
Timer |
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Match |
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Yes |
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Toggle Output |
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PTSPTSCycle |
= 0 |
= 1 |
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TBIT |
EPA0_TIME = EPA0_TIME + T1 |
EPA0_TIME = EPA0_TIME + (T2 - T1) |
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Toggle TBIT |
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A2552-02 |
Figure 5-17. EPA and PTS Operations for the PWM Toggle Mode Example
Software can change the duty cycle during the PWM operation. When a duty cycle change is required, the program writes new values of T1 and T2 – T1 to CSTORE1 and CSTORE2 and selects normal interrupt service for the next EPA0 interrupt. When the next timer match occurs, the output is toggled, and the device executes a normal interrupt service routine, which performs these operations:
1.The routine writes the new value of T1 (in CSTORE1) to PTSCONST1 and the new value of T1 – T2 (in CSTORE2) to PTSCONST2.
2.It selects PTS service for the EPA0 interrupt.
5-36