plc design - 10.6

step4 bottom LS

step2

step1

step1

FS

step1

flag up button

step3

step2

step2

step2

top LS

step4

step3

step3

step3 flag down button

step1

step4

step4

step 1

down

motor

step 3

up motor

Figure 10.4 Process Sequence Bits Without Latches

10.3 TIMING DIAGRAMS

Timing diagrams can be valuable when designing ladder logic for processes that are only dependant on time. The timing diagram is drawn with clear start and stop times. Ladder logic is constructed with timers that are used to turn outputs on and off at appropriate times. The basic method is;

1. Understand the process.

plc design - 10.7

2.Identify the outputs that are time dependant.

3.Draw a timing diagram for the outputs.

4.Assign a timer for each time when an output turns on or off.

5.Write the ladder logic to examine the timer values and turn outputs on or off.

Consider the handicap door opener design in Figure 10.5 that begins with a verbal description. The verbal description is converted to a timing diagram, with t=0 being when the door open button is pushed. On the timing diagram the critical times are 2s, 10s, 14s. The ladder logic is constructed in a careful order. The first item is the latch to seal-in the open button, but shut off after the last door closes. auto is used to turn on the three timers for the critical times. The logic for opening the doors is then written to use the timers.

plc design - 10.8

Description: A handicap door opener has a button that will open two doors. When the button is pushed (momentarily) the first door will start to open immediately, the second door will start to open 2 seconds later. The first door power will stay open for a total of 10 seconds, and the second door power will stay on for 14 seconds. Use a timing diagram to design the ladder logic.

Timing Diagram:

door 1

door 2

2s

10s

14s

Ladder Logic:

open button

T4:2/DN

auto

auto

auto

TON Timer T4:0 Delay 2s

TON

Timer T4:1

Delay 10s

TON

Timer T4:2

Delay 14s

T4:1/TT

door 1

T4:2/TT T4:0/DN

door 2

Figure 10.5 Design With a Timing Diagram

plc design - 10.9

10.4DESIGN CASES

10.5SUMMARY

•Timing diagrams can show how a system changes over time.

•Process sequence bits can be used to design a process that changes over time.

•Timing diagrams can be used for systems with a time driven performance.

10.6PRACTICE PROBLEMS

1.Write ladder logic that will give the following timing diagram for B after input A is pushed. After A is pushed any changes in the state of A will be ignored.

true
false					t(sec)
0	2	5	6	8	9

2.Design ladder logic for the timing diagram below. When an input A becomes active the sequence should start.

X

Y

Z

t (ms)

100

300

500

700

900

1100

1900

3.A wrapping process is to be controlled with a PLC. The general sequence of operations is described below. Develop the ladder logic using process sequence bits.

1.The folder is idle until a part arrives.

2.When a part arrives it triggers the part sensor and the part is held in place by actuating the hold actuator.