Микропроцессорная техника Сторожок / Datasheet.hk_dspic33fj32mc204_1234824
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dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-6: |
RPINR11: PERIPHERAL PIN SELECT INPUT REGISTER 11 |
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U-0 |
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U-0 |
U-0 |
U-0 |
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U-0 |
U-0 |
U-0 |
U-0 |
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— |
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— |
— |
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— |
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— |
— |
— |
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bit 15 |
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bit 8 |
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U-0 |
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U-0 |
U-0 |
R/W-1 |
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R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
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— |
— |
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OCFAR<4:0> |
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bit 7 |
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bit 0 |
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Legend: |
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R = Readable bit |
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W = Writable bit |
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U = Unimplemented bit, read as ‘0’ |
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-n = Value at POR |
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‘1’ = Bit is set |
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‘0’ = Bit is cleared |
x = Bit is unknown |
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bit 15-5 |
Unimplemented: Read as ‘0’ |
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bit 4-0 |
OCFAR<4:0>: Assign Output Capture A (OCFA) to the corresponding RPn pin bits |
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11111 |
= Input tied VSS |
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11001 |
= Input tied to RP25 |
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00001 |
= Input tied to RP1 |
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00000 |
= Input tied to RP0 |
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REGISTER 9-7: |
RPINR12: PERIPHERAL PIN SELECT INPUT REGISTER 12 |
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U-0 |
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U-0 |
U-0 |
U-0 |
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U-0 |
U-0 |
U-0 |
U-0 |
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— |
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— |
— |
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— |
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— |
— |
— |
— |
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bit 15 |
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bit 8 |
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U-0 |
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U-0 |
U-0 |
R/W-1 |
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R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
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— |
— |
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FLTA1R<4:0> |
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bit 7 |
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bit 0 |
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Legend: |
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R = Readable bit |
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W = Writable bit |
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U = Unimplemented bit, read as ‘0’ |
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-n = Value at POR |
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‘1’ = Bit is set |
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‘0’ = Bit is cleared |
x = Bit is unknown |
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bit 15-5 |
Unimplemented: Read as ‘0’ |
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to the corresponding RPn pin bits |
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bit 4-0 |
FLTA1R<4:0>: Assign PWM1 Fault |
(FLTA1) |
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11111 |
= Input tied VSS |
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11001 |
= Input tied to RP25 |
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00001 |
= Input tied to RP1 |
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00000 |
= Input tied to RP0 |
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♥ 2007 Microchip Technology Inc.
Preliminary
DS70283B-page 119
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-8: |
RPINR13: PERIPHERAL PIN SELECT INPUT REGISTER 13 |
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U-0 |
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U-0 |
U-0 |
U-0 |
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U-0 |
U-0 |
U-0 |
U-0 |
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— |
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— |
— |
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— |
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— |
— |
— |
— |
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bit 15 |
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bit 8 |
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U-0 |
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U-0 |
U-0 |
R/W-1 |
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R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
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— |
— |
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FLTA2R<4:0> |
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bit 7 |
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bit 0 |
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Legend: |
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R = Readable bit |
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W = Writable bit |
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U = Unimplemented bit, read as ‘0’ |
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-n = Value at POR |
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‘1’ = Bit is set |
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‘0’ = Bit is cleared |
x = Bit is unknown |
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bit 15-5 |
Unimplemented: Read as ‘0’ |
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to the corresponding RPn pin bits |
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bit 4-0 |
FLTA2R<4:0>: Assign PWM2 Fault |
(FLTA2) |
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11111 |
= Input tied VSS |
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11001 |
= Input tied to RP25 |
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00001 |
= Input tied to RP1 |
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00000 |
= Input tied to RP0 |
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DS70283B-page 120 |
Preliminary |
♥ 2007 Microchip Technology Inc. |
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-9: |
RPINR14: PERIPHERAL PIN SELECT OUTPUT REGISTERS 14 |
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U-0 |
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U-0 |
U-0 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
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— |
— |
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QEA1R<4:0> |
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bit 15 |
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bit 8 |
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U-0 |
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U-0 |
U-0 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
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— |
— |
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QEB1R<4:0> |
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bit 7 |
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bit 0 |
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Legend: |
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R = Readable bit |
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W = Writable bit |
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U = Unimplemented bit, read as ‘0’ |
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-n = Value at POR |
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‘1’ = Bit is set |
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‘0’ = Bit is cleared |
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x = Bit is unknown |
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bit 15-13 |
Unimplemented: Read as ‘0’ |
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bit 12-8 |
QEA1R<4:0>: Assign B (QEB) to the corresponding pin bits |
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11111 |
= Input tied VSS |
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11001 |
= Input tied to RP25 |
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00001 |
= Input tied to RP1 |
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00000 |
= Input tied to RP0 |
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bit 7-5 |
Unimplemented: Read as ‘0’ |
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bit 4-0 |
QEB1R<4:0>: Assign A(QEA) to the corresponding pin bits |
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11111 |
= Input tied VSS |
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11001 |
= Input tied to RP25 |
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00001 |
= Input tied to RP1 |
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00000 |
= Input tied to RP0 |
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♥ 2007 Microchip Technology Inc.
Preliminary
DS70283B-page 121
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-10: RPINR15: PERIPHERAL PIN SELECT INPUT REGISTER 15
U-0 |
U-0 |
U-0 |
U-0 |
U-0 |
U-0 |
U-0 |
U-0 |
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— |
— |
— |
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— |
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— |
— |
bit 15 |
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bit 8 |
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U-0 |
U-0 |
U-0 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
— |
— |
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INDX1R<4:0> |
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bit 7 |
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bit 0 |
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Legend: |
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R = Readable bit |
W = Writable bit |
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U = Unimplemented bit, read as ‘0’ |
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-n = Value at POR |
‘1’ = Bit is set |
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‘0’ = Bit is cleared |
x = Bit is unknown |
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bit 15-5 |
Unimplemented: Read as ‘0’ |
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bit 4-0 |
INDX1R<4:0>: Assign QEI INDEX (INDX) to the corresponding RPn pin bits |
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11111 = Input tied VSS |
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11001 = Input tied to RP25 |
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00001 = Input tied to RP1
00000 = Input tied to RP0
DS70283B-page 122 |
Preliminary |
♥ 2007 Microchip Technology Inc. |
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-11: RPINR18: PERIPHERAL PIN SELECT INPUT REGISTER 18
U-0 |
U-0 |
U-0 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
— |
— |
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U1CTSR<4:0> |
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bit 15 |
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bit 8 |
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U-0 |
U-0 |
U-0 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
— |
— |
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U1RXR<4:0> |
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bit 7 |
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bit 0 |
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Legend: |
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R = Readable bit |
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W = Writable bit |
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U = Unimplemented bit, read as ‘0’ |
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-n = Value at POR |
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‘1’ = Bit is set |
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‘0’ = Bit is cleared |
x = Bit is unknown |
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bit 15-13 |
Unimplemented: Read as ‘0’ |
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to the corresponding RPn pin bits |
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bit 12-8 |
U1CTSR<4:0>: Assign UART1 Clear to Send |
(U1CTS) |
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11111 |
= Input tied VSS |
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11001 |
= Input tied to RP25 |
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00001 |
= Input tied to RP1 |
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00000 |
= Input tied to RP0 |
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bit 7-5 |
Unimplemented: Read as ‘0’ |
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bit 4-0 |
U1RXR<4:0>: Assign UART1 Receive (U1RX) to the corresponding RPn pin bits |
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11111 |
= Input tied VSS |
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11001 |
= Input tied to RP25 |
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00001 |
= Input tied to RP1 |
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00000 |
= Input tied to RP0 |
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♥ 2007 Microchip Technology Inc.
Preliminary
DS70283B-page 123
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-12: RPINR20: PERIPHERAL PIN SELECT INPUT REGISTER 20
U-0 |
U-0 |
U-0 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
— |
— |
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SCK1R<4:0> |
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bit 15 |
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bit 8 |
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U-0 |
U-0 |
U-0 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
— |
— |
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SDI1R<4:0> |
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bit 7 |
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bit 0 |
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Legend: |
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R = Readable bit |
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W = Writable bit |
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U = Unimplemented bit, read as ‘0’ |
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-n = Value at POR |
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‘1’ = Bit is set |
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‘0’ = Bit is cleared |
x = Bit is unknown |
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bit 15-13 |
Unimplemented: Read as ‘0’ |
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bit 12-8 |
SCK1R<4:0>: Assign SPI1 Clock Input (SCK1IN) to the corresponding RPn pin bits |
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11111 |
= Input tied VSS |
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11001 |
= Input tied to RP25 |
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00001 |
= Input tied to RP1 |
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00000 |
= Input tied to RP0 |
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bit 7-5 |
Unimplemented: Read as ‘0’ |
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bit 4-0 |
SDI1R<4:0>: Assign SPI1 Data Input (SDI1) to the corresponding RPn pin bits |
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11111 |
= Input tied VSS |
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11001 |
= Input tied to RP25 |
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00001 |
= Input tied to RP1 |
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00000 |
= Input tied to RP0 |
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DS70283B-page 124 |
Preliminary |
♥ 2007 Microchip Technology Inc. |
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-13: RPINR21: PERIPHERAL PIN SELECT INPUT REGISTER 21
U-0 |
U-0 |
U-0 |
U-0 |
U-0 |
U-0 |
U-0 |
U-0 |
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— |
— |
— |
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— |
— |
— |
— |
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— |
bit 15 |
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bit 8 |
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U-0 |
U-0 |
U-0 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
R/W-1 |
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— |
— |
— |
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SS1R<4:0> |
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bit 7 |
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bit 0 |
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Legend: |
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R = Readable bit |
W = Writable bit |
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U = Unimplemented bit, read as ‘0’ |
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-n = Value at POR |
‘1’ = Bit is set |
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‘0’ = Bit is cleared |
x = Bit is unknown |
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bit 15-5 |
Unimplemented: Read as ‘0’ |
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bit 4-0 |
SS1R<4:0>: Assign SPI1 Slave Select Input (SS1IN) to the corresponding RPn pin bits |
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11111 = Input tied VSS |
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11001 = Input tied to RP25 |
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00001 = Input tied to RP1
00000 = Input tied to RP0
♥ 2007 Microchip Technology Inc.
Preliminary
DS70283B-page 125
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-14: RPOR0: PERIPHERAL PIN SELECT OUTPUT REGISTERS 0
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP1R<4:0> |
|
|
bit 15 |
|
|
|
|
|
|
|
bit 8 |
|
|
|
|
|
|
|
|
|
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP0R<4:0> |
|
|
bit 7 |
|
|
|
|
|
|
|
bit 0 |
|
|
|
|
|
|
|
|
|
Legend: |
|
|
|
|
|
|
|
|
R = Readable bit |
W = Writable bit |
|
U = Unimplemented bit, read as ‘0’ |
|
||||
-n = Value at POR |
‘1’ = Bit is set |
|
‘0’ = Bit is cleared |
x = Bit is unknown |
||||
bit 15-13 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 12-8 |
RP1R<4:0>: Peripheral Output Function is Assigned to RP1 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
bit 7-5 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 4-0 |
RP0R<4:0>: Peripheral Output Function is Assigned to RP0 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
REGISTER 9-15: RPOR1: PERIPHERAL PIN SELECT OUTPUT REGISTERS 1
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP3R<4:0> |
|
|
bit 15 |
|
|
|
|
|
|
|
bit 8 |
|
|
|
|
|
|
|
|
|
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP2R<4:0> |
|
|
bit 7 |
|
|
|
|
|
|
|
bit 0 |
|
|
|
|
|
|
|
|
|
Legend: |
|
|
|
|
|
|
|
|
R = Readable bit |
W = Writable bit |
|
U = Unimplemented bit, read as ‘0’ |
|
||||
-n = Value at POR |
‘1’ = Bit is set |
|
‘0’ = Bit is cleared |
x = Bit is unknown |
||||
bit 15-13 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 12-8 |
RP3R<4:0>: Peripheral Output Function is Assigned to RP3 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
bit 7-5 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 4-0 |
RP2R<4:0>: Peripheral Output Function is Assigned to RP2 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
DS70283B-page 126 |
Preliminary |
♥ 2007 Microchip Technology Inc. |
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-16: RPOR2: PERIPHERAL PIN SELECT OUTPUT REGISTERS 2
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP5R<4:0> |
|
|
bit 15 |
|
|
|
|
|
|
|
bit 8 |
|
|
|
|
|
|
|
|
|
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP4R<4:0> |
|
|
bit 7 |
|
|
|
|
|
|
|
bit 0 |
|
|
|
|
|
|
|
|
|
Legend: |
|
|
|
|
|
|
|
|
R = Readable bit |
W = Writable bit |
|
U = Unimplemented bit, read as ‘0’ |
|
||||
-n = Value at POR |
‘1’ = Bit is set |
|
‘0’ = Bit is cleared |
x = Bit is unknown |
||||
bit 15-13 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 12-8 |
RP5R<4:0>: Peripheral Output Function is Assigned to RP5 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
bit 7-5 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 4-0 |
RP4R<4:0>: Peripheral Output Function is Assigned to RP4 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
REGISTER 9-17: RPOR3: PERIPHERAL PIN SELECT OUTPUT REGISTERS 3
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP7R<4:0> |
|
|
bit 15 |
|
|
|
|
|
|
|
bit 8 |
|
|
|
|
|
|
|
|
|
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP6R<4:0> |
|
|
bit 7 |
|
|
|
|
|
|
|
bit 0 |
|
|
|
|
|
|
|
|
|
Legend: |
|
|
|
|
|
|
|
|
R = Readable bit |
W = Writable bit |
|
U = Unimplemented bit, read as ‘0’ |
|
||||
-n = Value at POR |
‘1’ = Bit is set |
|
‘0’ = Bit is cleared |
x = Bit is unknown |
||||
bit 15-13 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 12-8 |
RP7R<4:0>: Peripheral Output Function is Assigned to RP7 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
bit 7-5 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 4-0 |
RP6R<4:0>: Peripheral Output Function is Assigned to RP6 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
♥ 2007 Microchip Technology Inc.
Preliminary
DS70283B-page 127
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
REGISTER 9-18: RPOR4: PERIPHERAL PIN SELECT OUTPUT REGISTERS 0
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP9R<4:0> |
|
|
bit 15 |
|
|
|
|
|
|
|
bit 8 |
|
|
|
|
|
|
|
|
|
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP8R<4:0> |
|
|
bit 7 |
|
|
|
|
|
|
|
bit 0 |
|
|
|
|
|
|
|
|
|
Legend: |
|
|
|
|
|
|
|
|
R = Readable bit |
W = Writable bit |
|
U = Unimplemented bit, read as ‘0’ |
|
||||
-n = Value at POR |
‘1’ = Bit is set |
|
‘0’ = Bit is cleared |
x = Bit is unknown |
||||
bit 15-13 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 12-8 |
RP9R<4:0>: Peripheral Output Function is Assigned to RP9 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
bit 7-5 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 4-0 |
RP8R<4:0>: Peripheral Output Function is Assigned to RP8 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
REGISTER 9-19: RPOR5: PERIPHERAL PIN SELECT OUTPUT REGISTERS 5
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP11R<4:0> |
|
|
bit 15 |
|
|
|
|
|
|
|
bit 8 |
|
|
|
|
|
|
|
|
|
U-0 |
U-0 |
U-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
R/W-0 |
|
— |
— |
— |
|
|
|
RP10R<4:0> |
|
|
bit 7 |
|
|
|
|
|
|
|
bit 0 |
|
|
|
|
|
|
|
|
|
Legend: |
|
|
|
|
|
|
|
|
R = Readable bit |
W = Writable bit |
|
U = Unimplemented bit, read as ‘0’ |
|
||||
-n = Value at POR |
‘1’ = Bit is set |
|
‘0’ = Bit is cleared |
x = Bit is unknown |
||||
bit 15-13 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 12-8 |
RP11R<4:0>: Peripheral Output Function is Assigned to RP11 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
bit 7-5 |
Unimplemented: Read as ‘0’ |
|
|
|
|
|
||
bit 4-0 |
RP10R<4:0>: Peripheral Output Function is Assigned to RP10 Output Pin bits (see Table 9-2 for |
|||||||
|
peripheral function numbers) |
|
|
|
|
|
||
DS70283B-page 128 |
Preliminary |
♥ 2007 Microchip Technology Inc. |