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Микропроцессорная техника Сторожок / Datasheet.hk_dspic33fj32mc204_1234824

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dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

REGISTER 9-20: RPOR6: PERIPHERAL PIN SELECT OUTPUT REGISTERS 6

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP13R<4:0>

 

 

bit 15

 

 

 

 

 

 

 

bit 8

 

 

 

 

 

 

 

 

 

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP12R<4:0>

 

 

bit 7

 

 

 

 

 

 

 

bit 0

 

 

 

 

 

 

 

 

 

Legend:

 

 

 

 

 

 

 

 

R = Readable bit

W = Writable bit

 

U = Unimplemented bit, read as ‘0’

 

-n = Value at POR

‘1’ = Bit is set

 

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-13

Unimplemented: Read as ‘0

 

 

 

 

 

bit 12-8

RP13R<4:0>: Peripheral Output Function is Assigned to RP13 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

bit 7-5

Unimplemented: Read as ‘0

 

 

 

 

 

bit 4-0

RP12R<4:0>: Peripheral Output Function is Assigned to RP12 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

REGISTER 9-21: RPOR7: PERIPHERAL PIN SELECT OUTPUT REGISTERS 7

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP15R<4:0>

 

 

bit 15

 

 

 

 

 

 

 

bit 8

 

 

 

 

 

 

 

 

 

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP14R<4:0>

 

 

bit 7

 

 

 

 

 

 

 

bit 0

 

 

 

 

 

 

 

 

 

Legend:

 

 

 

 

 

 

 

 

R = Readable bit

W = Writable bit

 

U = Unimplemented bit, read as ‘0’

 

-n = Value at POR

‘1’ = Bit is set

 

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-13

Unimplemented: Read as ‘0

 

 

 

 

 

bit 12-8

RP15R<4:0>: Peripheral Output Function is Assigned to RP15 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

bit 7-5

Unimplemented: Read as ‘0

 

 

 

 

 

bit 4-0

RP14R<4:0>: Peripheral Output Function is Assigned to RP14 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

2007 Microchip Technology Inc.

Preliminary

DS70283B-page 129

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

REGISTER 9-22: RPOR8: PERIPHERAL PIN SELECT OUTPUT REGISTERS 8

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP17R<4:0>

 

 

bit 15

 

 

 

 

 

 

 

bit 8

 

 

 

 

 

 

 

 

 

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP16R<4:0>

 

 

bit 7

 

 

 

 

 

 

 

bit 0

 

 

 

 

 

 

 

 

 

Legend:

 

 

 

 

 

 

 

 

R = Readable bit

W = Writable bit

 

U = Unimplemented bit, read as ‘0’

 

-n = Value at POR

‘1’ = Bit is set

 

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-13

Unimplemented: Read as ‘0

 

 

 

 

 

bit 12-8

RP17R<4:0>: Peripheral Output Function is Assigned to RP17 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

bit 7-5

Unimplemented: Read as ‘0

 

 

 

 

 

bit 4-0

RP16R<4:0>: Peripheral Output Function is Assigned to RP16 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

REGISTER 9-23: RPOR9: PERIPHERAL PIN SELECT OUTPUT REGISTERS 9

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP19R<4:0>

 

 

bit 15

 

 

 

 

 

 

 

bit 8

 

 

 

 

 

 

 

 

 

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP18R<4:0>

 

 

bit 7

 

 

 

 

 

 

 

bit 0

 

 

 

 

 

 

 

 

 

Legend:

 

 

 

 

 

 

 

 

R = Readable bit

W = Writable bit

 

U = Unimplemented bit, read as ‘0’

 

-n = Value at POR

‘1’ = Bit is set

 

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-13

Unimplemented: Read as ‘0

 

 

 

 

 

bit 12-8

RP19R<4:0>: Peripheral Output Function is Assigned to RP19 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

bit 7-5

Unimplemented: Read as ‘0

 

 

 

 

 

bit 4-0

RP18R<4:0>: Peripheral Output Function is Assigned to RP18 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

DS70283B-page 130

Preliminary

2007 Microchip Technology Inc.

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

REGISTER 9-24: RPOR10: PERIPHERAL PIN SELECT OUTPUT REGISTERS 10

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP21R<4:0>

 

 

bit 15

 

 

 

 

 

 

 

bit 8

 

 

 

 

 

 

 

 

 

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP20R<4:0>

 

 

bit 7

 

 

 

 

 

 

 

bit 0

 

 

 

 

 

 

 

 

 

Legend:

 

 

 

 

 

 

 

 

R = Readable bit

W = Writable bit

 

U = Unimplemented bit, read as ‘0’

 

-n = Value at POR

‘1’ = Bit is set

 

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-13

Unimplemented: Read as ‘0

 

 

 

 

 

bit 12-8

RP21R<4:0>: Peripheral Output Function is Assigned to RP21 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

bit 7-5

Unimplemented: Read as ‘0

 

 

 

 

 

bit 4-0

RP20R<4:0>: Peripheral Output Function is Assigned to RP20 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

REGISTER 9-25: RPOR11: PERIPHERAL PIN SELECT OUTPUT REGISTERS 11

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP23R<4:0>

 

 

bit 15

 

 

 

 

 

 

 

bit 8

 

 

 

 

 

 

 

 

 

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP22R<4:0>

 

 

bit 7

 

 

 

 

 

 

 

bit 0

 

 

 

 

 

 

 

 

 

Legend:

 

 

 

 

 

 

 

 

R = Readable bit

W = Writable bit

 

U = Unimplemented bit, read as ‘0’

 

-n = Value at POR

‘1’ = Bit is set

 

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-13

Unimplemented: Read as ‘0

 

 

 

 

 

bit 12-8

RP23R<4:0>: Peripheral Output Function is Assigned to RP23 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

bit 7-5

Unimplemented: Read as ‘0

 

 

 

 

 

bit 4-0

RP22R<4:0>: Peripheral Output Function is Assigned to RP22 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

2007 Microchip Technology Inc.

Preliminary

DS70283B-page 131

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

REGISTER 9-26: RPOR12: PERIPHERAL PIN SELECT OUTPUT REGISTERS 12

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP25R<4:0>

 

 

bit 15

 

 

 

 

 

 

 

bit 8

 

 

 

 

 

 

 

 

 

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

 

 

 

RP24R<4:0>

 

 

bit 7

 

 

 

 

 

 

 

bit 0

 

 

 

 

 

 

 

 

 

Legend:

 

 

 

 

 

 

 

 

R = Readable bit

W = Writable bit

 

U = Unimplemented bit, read as ‘0’

 

-n = Value at POR

‘1’ = Bit is set

 

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-13

Unimplemented: Read as ‘0

 

 

 

 

 

bit 12-8

RP25R<4:0>: Peripheral Output Function is Assigned to RP25 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

bit 7-5

Unimplemented: Read as ‘0

 

 

 

 

 

bit 4-0

RP24R<4:0>: Peripheral Output Function is Assigned to RP24 Output Pin bits (see Table 9-2 for

 

peripheral function numbers)

 

 

 

 

 

DS70283B-page 132

Preliminary

2007 Microchip Technology Inc.

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

10.0TIMER1

Note: This data sheet summarizes the features of the dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to the “dsPIC33F Family Reference Manual”. Please see the Microchip web site (www.microchip.com) for the latest dsPIC33F Family Reference Manual sections.

The Timer1 module is a 16-bit timer, which can serve as the time counter for the real-time clock, or operate as a free-running interval timer/counter. Timer1 can operate in three modes:

16-bit Timer

16-bit Synchronous Counter

16-bit Asynchronous Counter

Timer1 also supports these features:

Timer gate operation

Selectable prescaler settings

Timer operation during CPU Idle and Sleep modes

Interrupt on 16-bit Period register match or falling edge of external gate signal

Figure 10-1 presents a block diagram of the 16-bit timer module.

To configure Timer1 for operation:

1.Set the TON bit (= 1) in the T1CON register.

2.Select the timer prescaler ratio using the TCKPS<1:0> bits in the T1CON register.

3.Set the Clock and Gating modes using the TCS and TGATE bits in the T1CON register.

4.Set or clear the TSYNC bit in T1CON to select synchronous or asynchronous operation.

5.Load the timer period value into the PR1 register.

6.If interrupts are required, set the interrupt enable bit, T1IE. Use the priority bits, T1IP<2:0>, to set the interrupt priority.

FIGURE 10-1: 16-BIT TIMER1 MODULE BLOCK DIAGRAM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCKPS<1:0>

 

SOSCO/

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TON

2

 

 

T1CK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1x

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Prescaler

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SOSCEN

 

 

 

 

Sync

 

 

 

 

 

 

01

 

 

 

 

 

 

 

1, 8, 64, 256

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SOSCI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCY

 

 

 

 

 

 

00

 

 

 

TGATE

 

 

TGATE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Q

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Set T1IF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Q

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TMR1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sync

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Comparator

 

 

 

 

 

 

 

 

 

 

 

TSYNC

 

 

 

 

 

 

 

 

 

 

 

 

 

Equal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PR1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2007 Microchip Technology Inc.

Preliminary

DS70283B-page 133

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

REGISTER 10-1: T1CON: TIMER1 CONTROL REGISTER

R/W-0

 

U-0

R/W-0

U-0

U-0

U-0

U-0

U-0

TON

 

TSIDL

 

 

bit 15

 

 

 

 

 

 

 

 

 

bit 8

 

 

 

 

 

 

 

 

 

 

 

U-0

 

R/W-0

R/W-0

R/W-0

U-0

R/W-0

R/W-0

U-0

 

TGATE

TCKPS<1:0>

TSYNC

TCS

 

bit 7

 

 

 

 

 

 

 

 

 

bit 0

 

 

 

 

 

 

 

 

 

 

 

Legend:

 

 

 

 

 

 

 

 

 

 

R = Readable bit

 

W = Writable bit

 

U = Unimplemented bit, read as ‘0’

 

-n = Value at POR

‘1’ = Bit is set

 

‘0’ = Bit is cleared

x = Bit is unknown

 

bit 15

TON: Timer1 On bit

 

 

 

 

 

 

 

1

= Starts 16-bit Timer1

 

 

 

 

 

 

 

0

= Stops 16-bit Timer1

 

 

 

 

 

 

bit 14

Unimplemented: Read as ‘0

 

 

 

 

 

 

bit 13

TSIDL: Stop in Idle Mode bit

 

 

 

 

 

 

 

1

= Discontinue module operation when device enters Idle mode

 

 

 

 

0

= Continue module operation in Idle mode

 

 

 

 

bit 12-7

Unimplemented: Read as ‘0

 

 

 

 

 

 

bit 6

TGATE: Timer1 Gated Time Accumulation Enable bit

 

 

 

 

When T1CS = 1: This bit is ignored.

When T1CS = 0:

1 = Gated time accumulation enabled

0 = Gated time accumulation disabled

bit 5-4

TCKPS<1:0> Timer1 Input Clock Prescale Select bits

 

11

= 1:256

 

10

= 1:64

 

01

= 1:8

 

00

= 1:1

bit 3

Unimplemented: Read as ‘0

bit 2

TSYNC: Timer1 External Clock Input Synchronization Select bit

 

When TCS = 1:

 

1

= Synchronize external clock input

 

0

= Do not synchronize external clock input

 

When TCS = 0:

 

This bit is ignored.

bit 1

TCS: Timer1 Clock Source Select bit

 

1

= External clock from pin T1CK (on the rising edge)

 

0

= Internal clock (FCY)

bit 0

Unimplemented: Read as ‘0

DS70283B-page 134

Preliminary

2007 Microchip Technology Inc.

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

11.0TIMER2/3 FEATURE

Note: This data sheet summarizes the features of the dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to the “dsPIC33F Family Reference Manual”. Please see the Microchip web site (www.microchip.com) for the latest dsPIC33F Family Reference Manual sections.

The Timer2/3 feature has three 2-bit timers that can also be configured as two independent 16-bit timers with selectable operating modes.

As a 32-bit timer, the Timer2/3 feature permits operation in three modes:

Two Independent 16-bit timers (e.g., Timer2 and Timer3) with all 16-bit operating modes (except Asynchronous Counter mode)

Single 32-bit timer (Timer2/3)

Single 32-bit synchronous counter (Timer2/3)

The Timer2/3 feature also supports:

Timer gate operation

Selectable prescaler settings

Timer operation during Idle and Sleep modes

Interrupt on a 32-bit period register match

Time base for Input Capture and Output Compare modules (Timer2 and Timer3 only)

ADC1 event trigger (Timer2/3 only)

Individually, all eight of the 16-bit timers can function as synchronous timers or counters. They also offer the features listed above, except for the event trigger. The operating modes and enabled features are determined by setting the appropriate bit(s) in the T2CON, T3CON registers. T2CON registers are shown in generic form in Register 11-1. T3CON registers are shown in Register 11-2.

For 32-bit timer/counter operation, Timer2 is the least significant word, and Timer3 is the most significant word of the 32-bit timers.

Note: For 32-bit operation, T3CON control bits are ignored. Only T2CON control bits are used for setup and control. Timer2 clock and gate inputs are used for the 32-bit timer modules, but an interrupt is generated with the Timer3 interrupt flags.

11.132-bit Operation

To configure the Timer2/3 feature timers for 32-bit operation:

1.Set the T32 control bit.

2.Select the prescaler ratio for Timer2 using the TCKPS<1:0> bits.

3.Set the Clock and Gating modes using the corresponding TCS and TGATE bits.

4.Load the timer period value. PR3 contains the most significant word of the value, while PR2 contains the least significant word.

5.If interrupts are required, set the interrupt enable bit, T3IE. Use the priority bits, T3IP<2:0>, to set the interrupt priority. While Timer2 controls the timer, the interrupt appears as a Timer3 interrupt.

6.Set the corresponding TON bit.

The timer value at any point is stored in the register pair, TMR3:TMR2, which always contains the most significant word of the count, while TMR2 contains the least significant word.

11.216-bit Operation

To configure any of the timers for individual 16-bit operation:

1.Clear the T32 bit corresponding to that timer.

2.Select the timer prescaler ratio using the TCKPS<1:0> bits.

3.Set the Clock and Gating modes using the TCS and TGATE bits.

4.Load the timer period value into the PRx register.

5.If interrupts are required, set the interrupt enable bit, TxIE. Use the priority bits, TxIP<2:0>, to set the interrupt priority.

6.Set the TON bit.

2007 Microchip Technology Inc.

Preliminary

DS70283B-page 135

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

FIGURE 11-1:

TIMER2/3 (32-BIT) BLOCK DIAGRAM(1)

 

 

 

 

 

 

 

 

 

TCKPS<1:0>

T2CK

 

 

 

 

 

TON

2

 

 

 

 

 

1x

 

 

 

 

Gate

 

01

Prescaler

 

 

 

Sync

 

1, 8, 64, 256

 

 

 

TCY

 

00

 

 

TGATE

 

 

 

 

 

TGATE

 

 

 

 

 

 

 

TCS

Set T3IF

1

 

Q

 

D

 

 

 

 

Q

CK

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

PR3

 

 

PR2

 

 

ADC Event Trigger(2)

 

 

 

 

 

 

 

Equal

Comparator

 

 

 

 

 

 

 

MSb

 

 

 

LSb

 

 

 

Reset

TMR3

 

TMR2

Sync

 

 

 

 

 

 

 

 

 

16

 

 

 

 

 

 

 

Read TMR2

 

 

 

 

 

 

Write TMR2

 

 

 

 

 

 

 

 

 

16

16

 

 

 

 

 

 

 

 

 

TMR3HLD

 

 

 

 

 

 

 

 

 

 

 

16

Data Bus<15:0>

Note 1: The 32-bit timer control bit, T32, must be set for 32-bit timer/counter operation. All control bits are respective to the T2CON register.

2:The ADC event trigger is available only on Timer2/3.

DS70283B-page 136

Preliminary

2007 Microchip Technology Inc.

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

FIGURE 11-2:

TIMER2 (16-BIT) BLOCK DIAGRAM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCKPS<1:0>

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TON

2

 

 

T2CK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1x

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate

 

 

 

 

 

 

 

 

 

 

Prescaler

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TGATE

 

 

 

 

 

 

 

 

 

Sync

 

 

 

 

 

 

 

 

01

 

 

 

 

 

 

1, 8, 64, 256

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

T

 

 

 

00

 

 

 

 

TCS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CY

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TGATE

 

 

 

Set T2IF

 

1

 

 

 

 

 

 

 

 

 

 

 

Q

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Q

 

CK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

Reset

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TMR2

 

 

 

 

 

 

 

 

 

 

Sync

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Comparator

Equal

PR2

2007 Microchip Technology Inc.

Preliminary

DS70283B-page 137

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

REGISTER 11-1: T2CON CONTROL REGISTER

R/W-0

 

 

U-0

R/W-0

U-0

U-0

U-0

U-0

U-0

TON

 

 

TSIDL

 

 

 

bit 15

 

 

 

 

 

 

 

 

 

 

 

bit 8

 

 

 

 

 

 

 

 

 

 

 

 

 

U-0

 

 

R/W-0

R/W-0

R/W-0

R/W-0

U-0

R/W-0

U-0

 

 

TGATE

TCKPS<1:0>

T32(1)

 

TCS

 

bit 7

 

 

 

 

 

 

 

 

 

 

 

bit 0

 

 

 

 

 

 

 

 

 

 

 

 

 

Legend:

 

 

 

 

 

 

 

 

 

 

 

 

R = Readable bit

 

W = Writable bit

 

U = Unimplemented bit, read as ‘0’

 

-n = Value at POR

‘1’ = Bit is set

 

‘0’ = Bit is cleared

 

x = Bit is unknown

 

bit 15

 

TON: Timer2 On bit

 

 

 

 

 

 

 

 

 

When T32 = 1:

 

 

 

 

 

 

 

 

1

= Starts 32-bit Timer2/3

 

 

 

 

 

 

 

 

0

= Stops 32-bit Timer2/3

 

 

 

 

 

 

 

 

 

When T32 = 0:

 

 

 

 

 

 

 

 

1

= Starts 16-bit Timer2

 

 

 

 

 

 

 

 

0

= Stops 16-bit Timer2

 

 

 

 

 

 

 

bit 14

 

Unimplemented: Read as ‘0

 

 

 

 

 

 

 

bit 13

 

TSIDL: Stop in Idle Mode bit

 

 

 

 

 

 

 

 

1

= Discontinue module operation when device enters Idle mode

 

 

 

 

0

= Continue module operation in Idle mode

 

 

 

 

bit 12-7

 

Unimplemented: Read as ‘0

 

 

 

 

 

 

 

bit 6

 

TGATE: Timer2 Gated Time Accumulation Enable bit

 

 

 

 

 

 

When TCS = 1:

 

 

 

 

 

 

 

 

 

This bit is ignored.

 

 

 

 

 

 

 

 

 

When TCS = 0:

 

 

 

 

 

 

 

 

1

= Gated time accumulation enabled

 

 

 

 

 

 

 

0

= Gated time accumulation disabled

 

 

 

 

 

 

bit 5-4

 

TCKPS<1:0>: Timer2 Input Clock Prescale Select bits

 

 

 

 

 

11 = 1:256

 

 

 

 

 

 

 

 

 

 

10 = 1:64

 

 

 

 

 

 

 

 

 

 

01 = 1:8

 

 

 

 

 

 

 

 

 

 

00 = 1:1

 

 

 

 

 

 

 

 

 

bit 3

 

T32: 32-bit Timer Mode Select bit(1)

 

 

 

 

 

 

 

1

= Timer2 and Timer3 form a single 32-bit timer

 

 

 

 

 

0

= Timer2 and Timer3 act as two 16-bit timers

 

 

 

 

bit 2

 

Unimplemented: Read as ‘0

 

 

 

 

 

 

 

bit 1

 

TCS: Timer2 Clock Source Select bit

 

 

 

 

 

 

 

1

= External clock from pin T2CK (on the rising edge)

 

 

 

 

 

0

= Internal clock (FCY)

 

 

 

 

 

 

 

bit 0

 

Unimplemented: Read as ‘0

 

 

 

 

 

 

 

Note 1:

In 32-bit mode, T3CON control bits do not affect 32-bit timer operation.

 

 

 

DS70283B-page 138

Preliminary

2007 Microchip Technology Inc.

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