15. Timer/Counter1 Prescaler

Figure 15-1 shows the Timer/Counter1 prescaler that supports two clocking modes, a synchronous clocking mode and an asynchronous clocking mode. The synchronous clocking mode uses the system clock (CK) as a clock timebase and asynchronous mode uses the fast peripheral clock (PCK) as a clock time base. The PCKE bit from the PLLCSR register enables the asynchronous mode when it is set (‘1’).

Figure 15-1. Timer/Counter1 Prescaler

PCKE

PSR1

CK

S T1CK PCK 64/32 MHz A

0

CS10

CS11

CS12

CS13

14-BIT

T/C PRESCALER

T1CK

T1CK/2

T1CK/4

T1CK/8

T1CK/16

T1CK/32

T1CK/64

T1CK/128

T1CK/256

T1CK/512

T1CK/1024

T1CK/2048

T1CK/4096

T1CK/8192

T1CK/16384

TIMER/COUNTER1 COUNT ENABLE

In the asynchronous clocking mode the clock selections are from PCK to PCK/16384 and stop, and in the synchronous clocking mode the clock selections are from CK to CK/16384 and stop. The clock options are described in Table 15-1 on page 90 and the Timer/Counter1 Control Register, TCCR1B.

The frequency of the fast peripheral clock is 64 MHz or 32 MHz in Low Speed mode (the LSM bit in PLLCSR register is set to one). The Low Speed Mode is recommended to use when the supply voltage below 2.7 volts are used.

15.0.1Prescaler Reset

Setting the PSR1 bit in TCCR1B register resets the prescaler. It is possible to use the Prescaler

Reset for synchronizing the Timer/Counter to program execution.

15.0.2Prescaler Initialization for Asynchronous Mode

To change Timer/Counter1 to the asynchronous mode follow the procedure below:

1.Enable PLL.

2.Wait 100 µs for PLL to stabilize.

3.Poll the PLOCK bit until it is set.

4.Set the PCKE bit in the PLLCSR register which enables the asynchronous mode.

88 ATtiny261/461/861

2588B–AVR–11/06