AMBA ASB

4.6.1Arbiter

The arbiter functions as follows:

1.Bus masters assert AREQx during the HIGH phase of BCLK.

2.The arbiter samples all AREQx signals on the falling edge of BCLK.

3.During the LOW phase of BCLK the arbiter also samples the BLOK signal and then asserts the appropriate AGNTx signal:

•if BLOK is LOW, then the arbiter will grant the highest priority bus master

•if BLOK is HIGH, then the arbiter will keep the same bus master granted.

The arbiter can update the grant signals every bus cycle. However, a new bus master can only become granted and start driving the bus when the current transfer completes, as indicated by BWAIT being LOW. Therefore, it is possible for the potential next bus master to change during waited transfers.

The BLOK signal is ignored by the arbiter during the single cycle of handover between two different bus masters.

If no bus masters are requesting the bus then the arbiter must grant the default bus master.

The arbitration protocol is defined, but the prioritization is flexible and left to the application. A simple fixed-priority scheme may be used. Alternatively, a more complex scheme can be implemented if required by the application.

4.6.2Bus master handover

Bus master handover occurs when a bus master, which is not currently granted the bus, becomes the new granted bus master.

A bus master becomes granted when AGNTx is HIGH and BWAIT is LOW. AGNT HIGH indicates that the bus master is currently the highest priority master requesting the bus and BWAIT LOW indicates the previous transfer has completed.

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AMBA ASB

Figure 4-10 shows the bus master handover process.

	C0	C1		C2	C3	C4
		Previous transfer			New master granted
BCLK
AREQ
AGNT
BTRAN[1:0]		A-TRAN	A-TRAN	A-TRAN	S-TRAN
BA[31:0]		Previous transfer			Address
		address
BD[31:0]		Previous transfer				Data
		data
				Last transfer	Decoder drives	Slave drives
				completes	response	response
BWAIT
BERROR	WAIT	WAIT		DONE	DONE	DONE
BLAST

Figure 4-10 Bus master handover

The following points should be noted:

•When AGNTx is asserted a bus master must drive the BTRAN signals during BCLK HIGH. This may continue for many cycles if the previous transfer is waited.

•Prior to handover BTRAN must indicate an ADDRESS-ONLY cycle because the new bus master must commence with an ADDRESS-ONLY cycle to allow for bus turnaround.

•When the previous transfer completes the new bus master will become granted.

•In the last clock HIGH phase of the previous transfer the address bus will stop being driven by the previous bus master.

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AMBA ASB

•The new bus master starts to drive the address bus and control signals during the clock LOW phase. The first transfer may then commence in the following bus cycle.

During a waited transfer, bus master handover may be delayed and it is possible that the AGNTx to a particular bus master may be asserted and then negated, if another higher priority bus master then requests the bus, before the current transfer has completed.

4.6.3Default bus master

Every system must be designed with a single default bus master, which will be granted when no other bus master is requesting the bus. The default bus master is responsible for driving the following signals to ensure the bus remains active:

•BTRAN must be driven to indicate ADDRESS-ONLY transfer

•BLOK must be driven LOW.

4.6.4Locked transfers

It is important that bus masters do not attempt to perform locked transfers to slaves which can give a RETRACT response. There are two reasons for this:

•The bus could remain locked for a large number of cycles.

•If the RETRACT occurs on the last transfer of the locked sequence, then the arbiter could have changed ownership of the bus to the next master before it completes and therefore the final transfer will not have been locked to the sequence.

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