When this clock source is selected, start-up times are determined by the SUT Fuses as shown in Table 6-10.

Table 6-10.		Start-up Times for the External Clock Selection
		Start-up Time from Power-	Additional Delay from
SUT1..0		down and Power-save	Reset	Recommended Usage
00		6 CK	14CK	BOD enabled
01		6 CK	14CK + 4 ms	Fast rising power
10		6 CK	14CK + 64 ms	Slowly rising power
11			Reserved

Note that the System Clock Prescaler can be used to implement run-time changes of the internal clock frequency while still ensuring stable operation. Refer to “System Clock Prescaler” on page 29 for details.

6.7.1High Frequency PLL Clock - PLLCLK

There is an internal PLL that provides nominally 64 MHz clock rate locked to the RC Oscillator for the use of the Peripheral Timer/Counter1 and for the system clock source. When selected as a system clock source, by programming the CKSEL fuses to ‘0001’, it is divided by four like shown in Table 6-11. When this clock source is selected, start-up times are determined by the SUT fuses as shown in Table 6-12. See also “PCK Clocking System” on page 23.

Table 6-11.		PLLCK Operating Modes
		CKSEL3..0			Nominal Frequency
		0001			16 MHz
Table 6-12.		Start-up Times for the PLLCK
		Start-up Time from Power			Additional Delay from
SUT1..0		Down and Power Save			Reset (VCC = 5.0V)		Recommended usage
00		1K CK			14CK + 8ms		BOD enabled
01		16K CK			14CK + 8ms		Fast rising power
10		1K CK			14CK + 68 ms		Slowly rising power
11		16K CK			14CK + 68 ms		Slowly rising power

6.8128 kHz Internal Oscillator

The 128 kHz internal Oscillator is a low power Oscillator providing a clock of 128 kHz. The frequency is nominal at 3V and 25°C. This clock may be select as the system clock by programming the CKSEL Fuses to “11”.

28 ATtiny25/45/85 Auto

7598C–AVR–09/06