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ATtiny25/45/85 Auto

trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set

Table 19-6.

ADC Auto Trigger Source Selections

 

ADTS2

 

ADTS1

ADTS0

Trigger Source

 

 

 

 

 

0

 

0

0

Free Running mode

 

 

 

 

 

0

 

0

1

Analog Comparator

 

 

 

 

 

0

 

1

0

External Interrupt Request 0

 

 

 

 

 

0

 

1

1

Timer/Counter Compare Match A

 

 

 

 

 

1

 

0

0

Timer/Counter Overflow

 

 

 

 

 

1

 

0

1

Timer/Counter Compare Match B

 

 

 

 

 

1

 

1

0

Pin Change Interrupt Request

 

 

 

 

 

 

 

 

 

 

19.7.9Digital Input Disable Register 0 – DIDR0

Bit

7

6

5

4

3

2

1

0

 

 

ADC0D

ADC2D

ADC3D

ADC1D

AIN1D

AIN0D

DIDR0

Read/Write

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

 

Initial Value

0

0

0

0

0

0

0

0

 

• Bits 5..2 – ADC3D..ADC0D: ADC3..0 Digital Input Disable

When this bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled. The corresponding PIN register bit will always read as zero when this bit is set. When an analog signal is applied to the ADC3..0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power consumption in the digital input buffer.

20. debugWIRE On-chip Debug System

20.1Features

Complete Program Flow Control

Emulates All On-chip Functions, Both Digital and Analog , except RESET Pin

Real-time Operation

Symbolic Debugging Support (Both at C and Assembler Source Level, or for Other HLLs)

Unlimited Number of Program Break Points (Using Software Break Points)

Non-intrusive Operation

Electrical Characteristics Identical to Real Device

Automatic Configuration System

High-Speed Operation

Programming of Non-volatile Memories

20.2Overview

The debugWIRE On-chip debug system uses a One-wire, bi-directional interface to control the program flow, execute AVR instructions in the CPU and to program the different non-volatile memories.

133

7598C–AVR–09/06

20.3Physical Interface

When the debugWIRE Enable (DWEN) Fuse is programmed and Lock bits are unprogrammed, the debugWIRE system within the target device is activated. The RESET port pin is configured as a wire-AND (open-drain) bi-directional I/O pin with pull-up enabled and becomes the communication gateway between target and emulator.

Figure 20-1. The debugWIRE Setup

1.8 - 5.5V

VCC

dW dW(RESET)

GND

Figure 20-1 shows the schematic of a target MCU, with debugWIRE enabled, and the emulator connector. The system clock is not affected by debugWIRE and will always be the clock source selected by the CKSEL Fuses.

When designing a system where debugWIRE will be used, the following observations must be made for correct operation:

Pull-Up resistor on the dW/(RESET) line must be in the range of 10k to 20 kΩ. However, the pull-up resistor is optional.

Connecting the RESET pin directly to VCC will not work.

Capacitors inserted on the RESET pin must be disconnected when using debugWire.

All external reset sources must be disconnected.

20.4Software Break Points

debugWIRE supports Program memory Break Points by the AVR Break instruction. Setting a Break Point in AVR Studio® will insert a BREAK instruction in the Program memory. The instruction replaced by the BREAK instruction will be stored. When program execution is continued, the stored instruction will be executed before continuing from the Program memory. A break can be inserted manually by putting the BREAK instruction in the program.

The Flash must be re-programmed each time a Break Point is changed. This is automatically handled by AVR Studio through the debugWIRE interface. The use of Break Points will therefore reduce the Falsh Data retention. Devices used for debugging purposes should not be shipped to end customers.

134 ATtiny25/45/85 Auto

7598C–AVR–09/06

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