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ATtiny25/45/85 Auto

Read/Write

R/W

R

R

R

R

R

R

R/W

Initial Value

0

0

0

0

0

0

0

0

• Bit 7 – TSM: Timer/Counter Synchronization Mode

Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the value that is written to the PSR0 bit is kept, hence keeping the Prescaler Reset signal asserted. This ensures that the Timer/Counter is halted and can be configured without the risk of advancing during configuration. When the TSM bit is written to zero, the PSR0 bit is cleared by hardware, and the Timer/Counter start counting.

• Bit 0 – PSR0: Prescaler Reset Timer/Counter0

When this bit is one, the Timer/Counter0 prescaler will be Reset. This bit is normally cleared immediately by hardware, except if the TSM bit is set.

14. 8-bit Timer/Counter1

The Timer/Counter1 is a general purpose 8-bit Timer/Counter module that has a separate prescaling selection from the separate prescaler.

Figure 14-1 shows the Timer/Counter1 prescaler that supports two clocking modes, a syncrhonous clocking mode and an asynchronous clocking mode. The synchronous clocking mode uses the system clock (CK) as the clock timebase and asynchronous mode uses the fast peripheral clock (PCK) as the clock time base. The PCKE bit from the PLLCSR register enables the asynchronous mode when it is set (‘1’).

Figure 14-1. Timer/Counter1 Prescaler

PCKE

PSR1

 

CK

S T1CK PCK 64/32 MHz A

0

CS10

CS11

CS12

CS13

14-BIT

T/C PRESCALER

T1CK

 

T1CK/2

T1CK/4

T1CK/8

T1CK/16

T1CK/32

T1CK/64

T1CK/128

T1CK/256

T1CK/512

T1CK/1024

T1CK/2048

T1CK/4096

T1CK/8192

T1CK/16384

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TIMER/COUNTER1 COUNT ENABLE

In the asynchronous clocking mode the clock selections are from PCK to PCK/16384 and stop, and in the synchronous clocking mode the clock selections are from CK to CK/16384 and stop. The clock options are described in Table 14-2 on page 83 and the Timer/Counter1 Control Register, TCCR1. Setting the PSR1 bit in GTCCR register resets the prescaler. The PCKE bit in the PLLCSR register enables the asynchronous mode. The frequency of the fast peripheral clock is 64 MHz (or 32 MHz in Low Speed Mode).

79

7598C–AVR–09/06

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