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12.3.2Alternate Functions of Port B

The Port B pins with alternate function are shown in Table 12-7 on page 69.

Table 12-7. Port B Pins Alternate Functions

	Port Pin	Alternate Function
	PB0	XTAL1:	Crystal Oscillator Input.
		PCINT8: Pin change interrupt 1 source 8.
	PB1	XTAL2:	Crystal Oscillator Output.
		PCINT9: Pin change interrupt 1 source 9.
		INT0:	External Interrupt 0 Input.
	PB2	OC0A: Timer/Counter0 Compare Match A output.
		CKOUT: System clock output.
		PCINT10:Pin change interrupt 1 source 10.
		RESET: Reset pin.
	PB3	dW:	debugWire I/O.
		PCINT11:Pin change interrupt 1 source 11.

• Port B, Bit 0 – XTAL1/PCINT8

XTAL1: Chip Clock Oscillator pin 1. Used for all chip clock sources except internal calibrateble RC oscillator. When used as a clock pin, the pin can not be used as an I/O pin. When using internal calibratable RC Oscillator as a chip clock source, PB0 serves as an ordinary I/O pin.

PCINT8: Pin Change Interrupt source 8. The PB0 pin can serve as an external interrupt source for pin change interrupt 1.

• Port B, Bit 1 – XTAL2/PCINT9

XTAL2: Chip Clock Oscillator pin 2. Used as clock pin for all chip clock sources except internal calibrateble RC Oscillator and external clock. When used as a clock pin, the pin can not be used as an I/O pin. When using internal calibratable RC Oscillator or External clock as a Chip clock sources, PB1 serves as an ordinary I/O pin.

PCINT9: Pin Change Interrupt source 9. The PB1 pin can serve as an external interrupt source for pin change interrupt 1.

• Port B, Bit 2 – INT0/OC0A/CKOUT/PCINT10

INT0: External Interrupt Request 0.

OC0A: Output Compare Match output: The PB2 pin can serve as an external output for the Timer/Counter0 Compare Match A. The PB2 pin has to be configured as an output (DDB2 set (one)) to serve this function. The OC0A pin is also the output pin for the PWM mode timer function.

CKOUT - System Clock Output: The system clock can be output on the PB2 pin. The system clock will be output if the CKOUT Fuse is programmed, regardless of the PORTB2 and DDB2 settings. It will also be output during reset.

PCINT10: Pin Change Interrupt source 10. The PB2 pin can serve as an external interrupt source for pin change interrupt 1.

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• Port B, Bit 3 – RESET/dW/PCINT11

RESET: External Reset input is active low and enabled by unprogramming (“1”) the RSTDISBL Fuse. Pullup is activated and output driver and digital input are deactivated when the pin is used as the RESET pin.

dW: When the debugWIRE Enable (DWEN) Fuse is programmed and Lock bits are unprogrammed, the debugWIRE system within the target device is activated. The RESET port pin is configured as a wire-AND (open-drain) bi-directional I/O pin with pull-up enabled and becomes the communication gateway between target and emulator.

PCINT11: Pin Change Interrupt source 11. The PB3 pin can serve as an external interrupt source for pin change interrupt 1.

Table 12-8 on page 70 and Table 12-9 on page 71 relate the alternate functions of Port B to the overriding signals shown in Figure 12-5 on page 62.

Table 12-8.		Overriding Signals for Alternate Functions in PB3..PB2
Signal		PB3/	RESET/dW/
Name		PCINT11							PB2/INT0/OC0A/CKOUT/PCINT10
PUOE					(1)+ DEBUGWIRE_ENABLE (2)				CKOUT
		RSTDISBL
PUOV		1							0
DDOE					(1) + DEBUGWIRE_ENABLE(2)				CKOUT
		RSTDISBL
		DEBUGWIRE_ENABLE(2) •
DDOV							debugWire		1'b1
		Transmit
PVOE					(1) + DEBUGWIRE_ENABLE(2)				CKOUT + OC0A enable
		RSTDISBL
PVOV		0							CKOUT • System Clock +		• OC0A
										CKOUT
PTOE		0							0
DIEOE		RSTDISBL(1) + DEBUGWIRE_ENABLE(2) +							PCINT10 • PCIE1 + INT0
		PCINT11 • PCIE1
DIEOV		DEBUGWIRE_ENABLE(2) + (RSTDISBL(1) •							PCINT10 • PCIE1 + INT0
		PCINT11 • PCIE1)
DI		dW/PCINT11 Input							INT0/PCINT10 Input
AIO

1.RSTDISBL is 1 when the Fuse is “0” (Programmed).

2.DebugWIRE is enabled wheb DWEN Fuse is programmed and Lock bits are unprogrammed.

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	Table 12-9.		Overriding Signals for Alternate Functions in PB1..PB0
	Signal
	Name		PB1/XTAL2/PCINT9	PB0/XTAL1/PCINT8
	PUOE		EXT_OSC (1)	EXT_CLOCK (2) + EXT_OSC(1)
	PUOV		0	0
	DDOE		EXT_OSC(1)	EXT_CLOCK(2) + EXT_OSC(1)
	DDOV		0	0
	PVOE		EXT_OSC(1)	EXT_CLOCK(2) + EXT_OSC(1)
	PVOV		0	0
	PTOE		0	0
	DIEOE		EXT_OSC (1)+	EXT_CLOCK(2) + EXT_OSC(1) +
			PCINT9 • PCIE1	(PCINT8 • PCIE1)
				( EXT_CLOCK(2) •						) +
	DIEOV		EXT_OSC(1) • PCINT9 • PCIE1					PWR_DOWN
				(EXT_CLOCK(2) • EXT_OSC(1) • PCINT8 • PCIE1)
	DI		PCINT9 Input	CLOCK/PCINT8 Input
	AIO		XTAL2	XTAL1

1.EXT_OSC = crystal oscillator or low frequency crystal oscillator is selected as system clock.

2.EXT_CLOCK = external clock is selected as system clock.

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