ATtiny2313/V
Alternate Functions of Port D The Port D pins with alternate functions are shown in Table 28.
Table 28. Port D Pins Alternate Functions
Port Pin |
Alternate Function |
PD6 ICP
PD5 OC0B/T1
PD4 T0
PD3 INT1
PD2 INT0/XCK/CKOUT
PD1 TXD
PD0 RXD
The alternate pin configuration is as follows:
• ICP – Port D, Bit 6
ICP: Timer/Counter1 Input Capture Pin. The PD6 pin can act as an Input Capture pin for
Timer/Counter1
• OC1B/T1 – Port D, Bit 5
OC0B: Output Compare Match B output: The PD5 pin can serve as an external output for the Timer/Counter0 Output Compare B. The pin has to be configured as an output (DDB5 set (one)) to serve this function. The OC0B pin is also the output pin for the PWM mode timer function.
T1: Timer/Counter1 External Counter Clock input is enabled by setting (one) the bits
CS02 and CS01 in the Timer/Counter1 Control Register (TCCR1).
• T0 – Port D, Bit 4
T0: Timer/Counter0 External Counter Clock input is enabled by setting (one) the bits
CS02 and CS01 in the Timer/Counter0 Control Register (TCCR0).
• INT1 – Port D, Bit 3
INT0: External Interrupt Source 0. The PD3 pin can serve as an external interrupt source to the MCU.
• INT0/XCK/CKOUT – Port D, Bit 2
INT1: External Interrupt Source 1. The PD2 pin can serve as en external interrupt source to the MCU.
XCK: USART Transfer Clock used only by Synchronous Transfer mode.
CKOUT: System Clock Output
• TXD – Port D, Bit 1
TXD: UART Data Transmitter.
• RXD – Port D, Bit 0
RXD: UART Data Receiver.
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2543H–AVR–02/05
Table 29 and Table 30 relates the alternate functions of Port D to the overriding signals shown in Figure 25 on page 50.
Table 29. Overriding Signals for Alternate Functions PD7..PD4
Signal |
|
|
|
Name |
PD6/ICP |
PD5/OC1B/T1 |
PD4/T0 |
|
|
|
|
PUOE |
0 |
0 |
0 |
|
|
|
|
PUOV |
0 |
0 |
0 |
|
|
|
|
DDOE |
0 |
0 |
0 |
|
|
|
|
DDOV |
0 |
0 |
0 |
|
|
|
|
PVOE |
0 |
OC1B_PVOE |
0 |
|
|
|
|
PVOV |
0 |
OC1B_PVOV |
0 |
|
|
|
|
PTOE |
0 |
0 |
0 |
|
|
|
|
DIEOE |
ICP ENABLE |
T1 ENABLE |
T0 ENABLE |
|
|
|
|
DIEOV |
1 |
1 |
1 |
|
|
|
|
DI |
ICP INPUT |
T1 INPUT |
T0 INPUT |
|
|
|
|
AIO |
– |
– |
AIN1 |
|
|
|
|
Table 30. Overriding Signals for Alternate Functions in PD3..PD0
Signal |
|
PD2/INT0/XCK/ |
|
|
|
|
Name |
PD3/INT1 |
CKOUT |
PD1/TXD |
PD0/RXD |
||
|
|
|
|
|
||
PUOE |
0 |
0 |
TXD_OE |
RXD_OE |
||
|
|
|
|
|
|
|
PUOV |
0 |
0 |
0 |
PORTD0 • |
|
|
PUD |
||||||
|
|
|
|
|
||
DDOE |
0 |
0 |
TXD_OE |
RXD_EN |
||
|
|
|
|
|
|
|
DDOV |
0 |
0 |
1 |
0 |
|
|
|
|
|
|
|
|
|
PVOE |
0 |
XCKO_PVOE |
TXD_OE |
0 |
|
|
|
|
|
|
|
|
|
PVOV |
0 |
XCKO_PVOV |
TXD_PVOV |
0 |
|
|
|
|
|
|
|
|
|
PTOE |
0 |
0 |
0 |
0 |
|
|
|
|
|
|
|
|
|
DIEOE |
INT1 ENABLE |
INT0 ENABLE/ |
0 |
0 |
|
|
|
|
XCK INPUT |
|
|
|
|
|
|
ENABLE |
|
|
|
|
|
|
|
|
|
|
|
DIEOV |
1 |
1 |
0 |
0 |
|
|
|
|
|
|
|
||
DI |
INT1 INPUT |
INT0 INPUT/ |
– |
RXD INPUT |
||
|
|
XCK INPUT |
|
|
|
|
|
|
|
|
|
||
AIO |
– |
– |
– |
– |
||
|
|
|
|
|
|
|
56 ATtiny2313/V
2543H–AVR–02/05