Further reading for chapter 8	295

distributed in x and y. DiVerent patterns can then be set up in several areas on the same chip, and then analyzed by a microscopic technique to screen for the `best' properties. Typically, such techniques will be useful when one has to span a large range of parameters, and when theoretical models are of limited use. Stepper motors controlling stage movements and multiple deposition shutters, with a resolution of a few micrometers are now available more or less routinely (if expensively), which means that many thousands of diVerent samples can be screened in a single experiment.

An example is the search for improved red phosphor materials to be used in ¯at panel displays (Danielson et al. 1997). The starting point materials were polycrystalline ternary or quaternary oxide layers acting as hosts for `activator' rare earth ions such as Eu or Ce. Some 25000 individual compositions deposited onto a 3-inch wafer were sampled,

leading to a single best composition of Y0.845Al0.070La0.060Eu0.025VO4. This composition was found to be as good as the existing commercial phosphors. It is clearly just a ques-

tion of time before superior thin ®lm materials are found using such techniques, which originated in the pharmaceutical industry as a means of accelerated drug discovery.

The next stage may well be to combine such approaches with patterned substrates, so that diVerent areas explore diVerent surface treatments or diVerent growth regimes. A start in this direction, with emphasis on molecular recognition of metal and semiconductor nanocrystals, has been made by Vossmeyer et al. (1998), and patterned arrays of bio-macromolecules have also been demonstrated. Flexible patterned substrates are also being produced via soft lithography, micro-contact printing and related techniques (Xia & Whitesides 1998). Such approaches involving microarrays of DNA are centrally involved in the future of the human genome project (DeRisi et al. 1997). The huge interest in microbiology means that such experiments, including seletively tagging the colloidal nanoparticles described in the section 8.4.2, are achieving widespread recognition in the materials community (Mirkin et al. 1996, 1999), even if, or perhaps because, most of the rest of us are very early on the learning curve. But we can all recognize the implied potential of the ®eld.

All this suggests that we should consider creating patterned nests for microbes, so that we can then sit back and let them do our work for us. Indeed Richard Feynman was ®rst with this suggestion in a famous lecture in 1959 entitled `There's plenty of room at the bottom', republished as Feynman (1992) in a new Journal of Microelectromechanical Systems. I'll bet that H.G. Wells had the basic idea well before that ± is there anything really new? But this is getting dangerously close to futurology, the proper business of the twenty-®rst century, not the twentieth. As this chapter is ®nalized, in December 1999, the decoding of chromosome 22 made headline news, special millennium issues of the journals arrived, and I started to read articles entitled `The Net Century', etc. A few words on such topics and the educational/training implications in the short ®nal chapter, and I'm done. The twenty-®rst century is essentially yours: good luck!

Further reading for chapter 8

Davies, J.H. (1998) The Physics of Low-dimensional Semiconductors: an Introduction

(Cambridge University Press).

2968 Surface processes in thin ®lm devices

Jaros, M. (1989) Physics and Applications of Semiconductor Microstructures (Oxford University Press).

Ferry, D.K. & S.M. Goodnick (1997) Transport in Nanostructures (Cambridge University Press), chapters 1±4.

Kelly, M.J. (1995) Low-dimensional Semiconductors (Oxford University Press).

Lüth, H. (1993/5) Surfaces and Interfaces of Solid Surfaces (2nd/3rd Edns, Springer) chapters 7 and 8.

Rossiter, P.L. (1987) The Electrical Resistivity of Metals and Alloys (Cambridge University Press).

Sutton, A.P. & R.W. BalluY (1995) Interfaces in Crystalline Materials (Oxford University Press) chapter 11.

Schroder, D.K. (1998) Semiconductor Material and Device Characterization (John Wiley).

Sze, S.M. (1981) Physics of Semiconductor Devices (2nd Edn, John Wiley) chapter 5. Tinkham, M. (1996) Introduction to Superconductivity (2nd Edn, McGraw-Hill).

9Postscript ± where do we go from here?

This short postscript wraps up the book, and provides pointers to further reading and gathering information. The comments are personal impressions rather than cut and dried issues. Please take them suitably lightly ± and then get on with the rest of your life which is, of course, all too short. Time is the only real enemy ± someone must have said that before.

9.1Electromigration and other degradation effects in nanostructures

Degradation over time is an important part of materials science, and is inherent in the metastabilty of all arti®cially tailored structures. It is a major reason why I will have to replace the laptop computer, on which I have been composing this book, in the not- too-distant future. There are many surface and thin-®lm related degradation processes involved, some of which have been discussed in the book, and some of which have been omitted for reasons of space and time. Others are being researched and could use a good review article. However, if I don't ®nish this book now, I never will (another example of degradation over time). I need to get on with other aspects of my life and so do you.

Polycrystalline metal wires forming interconnects can fail via necking of `bamboo' structures, for the same basic reason as the tungsten ®laments discussed in section 6.2.1. Such a wire has slight changes in thickness along its length, being slightly thinner where grain boundaries cross the wire, and slightly thicker either side (hence the name bamboo). When a current is passed, the resistance heating is greater in the grain boundary regions mostly because of the smaller cross section, and this leads to atom migration, principally by surface and grain boundary diVusion, towards the equilibrium structure.

Once we have a thin wire, the surface energy is important, and we know from the discussion in section 1.2 that the equilibrium shape is close to a sphere, and is given by the WulV plot. Thus a thin wire tries to become shorter and more rounded, eliminating grain boundaries as it coarsens. This will happen more quickly for higher current densities, and at higher operating temperatures, both of which are implicated in smaller devices. Needless to say, eventually these eVects sever the wire in two: bad news for me, and doubtless well calculated by the computer manufacturer who would love me to

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2989 Postscript ± where do we go from here?

purchase a new one, subject to avoiding recalls on existing models and law suits. Under accelerated test conditions at high temperatures, this contraction, or expansion of a wire under load, forms the zero creep method of measuring surface energy, as mentioned in section 1.2.1.

Metal interconnects are very important components in integrated circuits (ICs), and have been mostly been made of aluminum, with copper being actively developed as a replacement for use at higher current densities. As wires and FET gate electrodes, these

metals are laid down typically on the amorphous SiO2 which is the insulating surface on Si-based MOS devices; they will grow as polycrystalline layers by nucleation and

growth processes similar to those described in chapter 5. As contacts to silicon, they can be either ohmic (to get current in or out) or form control elements as in the Schottky barrier discussed in section 8.2.

Most metals are in fact very reactive to silicon itself. Metal±semiconductor interactions is an enormous topic, which has been visited at various points in this book, but not described systematically. This is an area where much work has been done, but it feels to me as if the de®nitive review has not yet been written; in any case it probably needs a whole book to itself. It is important to note here that substantial rearrangements of both metal and semiconductor at the interface results from this reactivity, as in the case of Ag/Ge or Si(111) shown in ®gure 1.20, and illustrated on the cover design. In many cases barrier layers consisting of more tightly bound metals, alloys and/or silicides, have been used to slow down interdiVusion across these interfaces and so prolong device lifetimes (Lloyd 1999).

Experiments on many metals deposited on semiconductors have investigated these interactions. As these are performed at elevated temperatures, some means of heating the semiconductor substrate is needed. Often simple direct current has been used, and as a result electromigration eVects have been uncovered, that is, a directional movement of material due to a combination of electric potential and current. These eVects have been reviewed by Yasunaga & Natori (1992), and have been found to occur in many systems since; it is also a topic which probably needs an update in review form.

As we look towards semiconductor devices during the twenty-®rst century, we can see that the issues aired in chapter 8 and in this section are capturing the imagination of relevant scientists and technologists (see, for example, Williams 1999). Although

they all agree about the current economic dominance of CMOS Al±Si±SiO2 based IC technology, there are increasing discussions of `the end of the roadmap' or `what happens below 0.1 mm [feature size]?' or `what are the costs of the next generation of

Fabs?'. These concerns center around what became known as Moore's law, named after one of the founders of Intel, who noted the exponential decrease of IC feature size as with time, corresponding roughly to a factor of two every three years over several decades.

Much of this information is being gleaned by science journalists, who can distill journal articles, and combine them with interviews of key industrial and academic players, in language which may be accessible to a wider public. One such article, published under the title Failure analysis in the nanometer world, quotes the head of failure analysis at Texas Instruments, Lawrence Wagner, to the eVect that ®nding a fault in an