ATmega8535(L)
Overview
Block Diagram
The ATmega8535 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the ATmega8535 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
Figure 2. |
Block Diagram |
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PA0 - PA7 |
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PC0 - PC7 |
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VCC |
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PORTA DRIVERS/BUFFERS |
PORTC DRIVERS/BUFFERS |
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GND |
PORTA DIGITAL INTERFACE |
PORTC DIGITAL INTERFACE |
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AVCC |
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MUX & |
ADC |
TWI |
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INTERFACE |
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ADC |
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AREF |
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PROGRAM |
STACK |
TIMERS/ |
OSCILLATOR |
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COUNTERS |
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COUNTER |
POINTER |
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PROGRAM |
SRAM |
INTERNAL |
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FLASH |
OSCILLATOR |
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XTAL1 |
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INSTRUCTION |
GENERAL |
WATCHDOG |
OSCILLATOR |
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REGISTER |
TIMER |
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PURPOSE |
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REGISTERS |
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X |
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XTAL2 |
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INSTRUCTION |
Y |
MCU CTRL. |
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RESET |
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DECODER |
& TIMING |
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Z |
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CONTROL |
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INTERRUPT |
INTERNAL |
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CALIBRATED |
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LINES |
ALU |
UNIT |
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OSCILLATOR |
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AVR CPU |
STATUS |
EEPROM |
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REGISTER |
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PROGRAMMING |
SPI |
USART |
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LOGIC |
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+ |
COMP. |
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- |
INTERFACE |
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PORTB DIGITAL INTERFACE |
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PORTD DIGITAL INTERFACE |
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PORTB DRIVERS/BUFFERS |
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PORTD DRIVERS/BUFFERS |
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PB0 - PB7 |
PD0 - PD7 |
3
2502F–AVR–06/04