- •Features
- •Pin Configurations
- •Disclaimer
- •Overview
- •Block Diagram
- •AT90S8535 Compatibility
- •Pin Descriptions
- •Port A (PA7..PA0)
- •Port B (PB7..PB0)
- •Port C (PC7..PC0)
- •Port D (PD7..PD0)
- •RESET
- •XTAL1
- •XTAL2
- •AVCC
- •AREF
- •AVR CPU Core
- •Introduction
- •Architectural Overview
- •Status Register
- •Stack Pointer
- •Interrupt Response Time
- •SRAM Data Memory
- •Data Memory Access Times
- •EEPROM Data Memory
- •EEPROM Read/Write Access
- •I/O Memory
- •Clock Systems and their Distribution
- •Clock Sources
- •Default Clock Source
- •Crystal Oscillator
- •External RC Oscillator
- •External Clock
- •Timer/Counter Oscillator
- •Idle Mode
- •Power-down Mode
- •Power-save Mode
- •Standby Mode
- •Extended Standby Mode
- •Analog-to-Digital Converter
- •Analog Comparator
- •Brown-out Detector
- •Internal Voltage Reference
- •Watchdog Timer
- •Port Pins
- •Resetting the AVR
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Brown-out Detection
- •Watchdog Reset
- •Watchdog Timer
- •Timed Sequences for Changing the Configuration of the Watchdog Timer
- •Safety Level 0
- •Safety Level 1
- •Safety Level 2
- •Interrupts
- •I/O-Ports
- •Introduction
- •Configuring the Pin
- •Reading the Pin Value
- •Unconnected pins
- •Alternate Port Functions
- •Alternate Functions of Port A
- •Alternate Functions Of Port B
- •Alternate Functions of Port C
- •Alternate Functions of Port D
- •External Interrupts
- •8-bit Timer/Counter0 with PWM
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Output Compare Unit
- •Force Output Compare
- •Modes of Operation
- •Normal Mode
- •Fast PWM Mode
- •Phase Correct PWM Mode
- •Internal Clock Source
- •Prescaler Reset
- •External Clock Source
- •16-bit Timer/Counter1
- •Overview
- •Registers
- •Definitions
- •Compatibility
- •Counter Unit
- •Input Capture Unit
- •Input Capture Trigger Source
- •Noise Canceler
- •Using the Input Capture Unit
- •Output Compare Units
- •Force Output Compare
- •Modes of Operation
- •Normal Mode
- •Fast PWM Mode
- •Phase Correct PWM Mode
- •8-bit Timer/Counter2 with PWM and Asynchronous Operation
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Output Compare Unit
- •Force Output Compare
- •Modes of Operation
- •Normal Mode
- •Fast PWM Mode
- •Phase Correct PWM Mode
- •Timer/Counter Prescaler
- •SS Pin Functionality
- •Slave Mode
- •Master Mode
- •Data Modes
- •USART
- •Overview
- •Clock Generation
- •External Clock
- •Synchronous Clock Operation
- •Frame Formats
- •Parity Bit Calculation
- •USART Initialization
- •Sending Frames with 5 to 8 Data Bits
- •Sending Frames with 9 Data Bits
- •Parity Generator
- •Disabling the Transmitter
- •Receiving Frames with 5 to 8 Data Bits
- •Receiving Frames with 9 Data Bits
- •Receiver Error Flags
- •Parity Checker
- •Disabling the Receiver
- •Flushing the Receive Buffer
- •Asynchronous Data Recovery
- •Using MPCM
- •Write Access
- •Read Access
- •Two-wire Serial Interface
- •Features
- •TWI Terminology
- •Electrical Interconnection
- •Transferring Bits
- •START and STOP Conditions
- •Address Packet Format
- •Data Packet Format
- •Overview of the TWI Module
- •SCL and SDA Pins
- •Bit Rate Generator Unit
- •Bus Interface Unit
- •Address Match Unit
- •Control Unit
- •TWI Register Description
- •Using the TWI
- •Transmission Modes
- •Master Transmitter Mode
- •Master Receiver Mode
- •Slave Receiver Mode
- •Slave Transmitter Mode
- •Miscellaneous States
- •Analog Comparator
- •Analog Comparator Multiplexed Input
- •Features
- •Operation
- •Starting a Conversion
- •Differential Gain Channels
- •Changing Channel or Reference Selection
- •ADC Input Channels
- •ADC Voltage Reference
- •ADC Noise Canceler
- •Analog Input Circuitry
- •ADC Accuracy Definitions
- •ADC Conversion Result
- •ADLAR = 0
- •ADLAR = 1
- •Boot Loader Features
- •Application Section
- •Boot Loader Lock Bits
- •Performing a Page Write
- •Using the SPM Interrupt
- •Setting the Boot Loader Lock Bits by SPM
- •Reading the Fuse and Lock Bits from Software
- •Preventing Flash Corruption
- •Simple Assembly Code Example for a Boot Loader
- •Fuse Bits
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Signal Names
- •Parallel Programming
- •Enter Programming Mode
- •Chip Erase
- •Programming the Flash
- •Programming the EEPROM
- •Reading the Flash
- •Reading the EEPROM
- •Programming the Lock Bits
- •Reading the Signature Bytes
- •Reading the Calibration Byte
- •Serial Downloading
- •Data Polling Flash
- •Data Polling EEPROM
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •DC Characteristics
- •External Clock Drive Waveforms
- •External Clock Drive
- •Two-wire Serial Interface Characteristics
- •Active Supply Current
- •Idle Supply Current
- •Power-Save Supply Current
- •Standby Supply Current
- •Pin Pullup
- •Pin Driver Strength
- •Internal Oscillator Speed
- •Register Summary
- •Instruction Set Summary
- •Ordering Information
- •Packaging Information
- •Errata
- •ATmega8535 all rev.
- •Datasheet Change Log for ATmega8535
- •Changes from Rev. 2502E-12/03 to Rev. 2502F-06/04
- •Changes from Rev. 2502D-09/03 to Rev. 2502E-12/03
- •Changes from Rev. 2502C-04/03 to Rev. 2502D-09/03
- •Changes from Rev. 2502B-09/02 to Rev. 2502C-04/03
- •Changes from Rev. 2502A-06/02 to Rev. 2502B-09/02
- •Table of Contents
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ATmega8535(L) |
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Ordering Information |
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Speed (MHz) |
Power Supply |
Ordering Code |
Package(1) |
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Operation Range |
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ATmega8535L-8AC |
44A |
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ATmega8535L-8PC |
40P6 |
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Commercial |
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ATmega8535L-8JC |
44J |
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(0°C to 70°C) |
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8 |
2.7 - 5.5V |
ATmega8535L-8MC |
44M1 |
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ATmega8535L-8AI |
44A |
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ATmega8535L-8PI |
40P6 |
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Industrial |
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ATmega8535L-8JI |
44J |
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(-40°C to 85°C) |
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ATmega8535L-8MI |
44M1 |
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ATmega8535-16AC |
44A |
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ATmega8535-16PC |
40P6 |
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Commercial |
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ATmega8535-16JC |
44J |
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(0°C to 70°C) |
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16 |
4.5 - 5.5V |
ATmega8535-16MC |
44M1 |
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ATmega8535-16AI |
44A |
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ATmega8535-16PI |
40P6 |
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Industrial |
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ATmega8535-16JI |
44J |
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(-40°C to 85°C) |
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ATmega8535-16MI |
44M1 |
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Note: |
1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information |
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and minimum quantities. |
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Package Type |
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44A |
44-lead, Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) |
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40P6 |
40-pin, 0.600” Wide, Plastic Dual Inline Package (PDIP) |
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44J |
44-lead, Plastic J-leaded Chip Carrier (PLCC) |
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44M1-A |
44-pad, 7 x 7 x 1.0 mm body, lead pitch 0.50 mm, Micro Lead Frame Package (MLF) |
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301
2502F–AVR–06/04
Packaging Information
44A
PIN 1
B
PIN 1 IDENTIFIER
e |
E1 E |
D1
D
C |
0˚~7˚ |
A1 A2
L
Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB.
2.Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch.
3.Lead coplanarity is 0.10 mm maximum.
A
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL |
MIN |
NOM |
MAX |
NOTE |
A |
– |
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1.20 |
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A1 |
0.05 |
– |
0.15 |
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A2 |
0.95 |
1.00 |
1.05 |
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D |
11.75 |
12.00 |
12.25 |
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D1 |
9.90 |
10.00 |
10.10 |
Note 2 |
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E |
11.75 |
12.00 |
12.25 |
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E1 |
9.90 |
10.00 |
10.10 |
Note 2 |
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B |
0.30 |
– |
0.45 |
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C |
0.09 |
– |
0.20 |
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L |
0.45 |
– |
0.75 |
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e |
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0.80 TYP |
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10/5/2001
2325 Orchard Parkway |
TITLE |
DRAWING NO. |
REV. |
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44A, 44-lead, 10 x 10 mm Body Size, 1.0 mm Body Thickness, |
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R San Jose, CA 95131 |
44A |
B |
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0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) |
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302 ATmega8535(L)
2502F–AVR–06/04
ATmega8535(L)
40P6
D
PIN 1
E1
A
SEATING PLANE
A1
L
B
B1 e
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E |
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C |
0º ~ 15º |
REF |
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eB
Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC.
2.Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL |
MIN |
NOM |
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MAX |
NOTE |
A |
– |
– |
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4.826 |
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A1 |
0.381 |
– |
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– |
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D |
52.070 |
– |
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52.578 |
Note 2 |
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E |
15.240 |
– |
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15.875 |
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E1 |
13.462 |
– |
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13.970 |
Note 2 |
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B |
0.356 |
– |
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0.559 |
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B1 |
1.041 |
– |
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1.651 |
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L |
3.048 |
– |
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3.556 |
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C |
0.203 |
– |
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0.381 |
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eB |
15.494 |
– |
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17.526 |
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e |
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2.540 TYP |
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09/28/01
TITLE
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2325 Orchard Parkway |
40P6, 40-lead (0.600"/15.24 mm Wide) Plastic Dual |
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San Jose, CA 95131 |
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Inline Package (PDIP) |
DRAWING NO. REV.
40P6 B
303
2502F–AVR–06/04
44J
1.14(0.045) X 45˚ |
PIN NO. 1 |
1.14(0.045) X 45˚ |
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0.318(0.0125) |
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IDENTIFIER |
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0.191(0.0075) |
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E1 |
E |
B1 |
D2/E2 |
B
e
A2
D1
A1
D
A
0.51(0.020)MAX 45˚ MAX (3X)
COMMON DIMENSIONS
(Unit of Measure = mm)
Notes: 1. This package conforms to JEDEC reference MS-018, Variation AC.
2.Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line.
3.Lead coplanarity is 0.004" (0.102 mm) maximum.
SYMBOL |
MIN |
NOM |
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MAX |
NOTE |
A |
4.191 |
– |
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4.572 |
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A1 |
2.286 |
– |
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3.048 |
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A2 |
0.508 |
– |
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– |
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D |
17.399 |
– |
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17.653 |
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D1 |
16.510 |
– |
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16.662 |
Note 2 |
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E |
17.399 |
– |
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17.653 |
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E1 |
16.510 |
– |
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16.662 |
Note 2 |
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D2/E2 |
14.986 |
– |
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16.002 |
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B |
0.660 |
– |
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0.813 |
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B1 |
0.330 |
– |
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0.533 |
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e |
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1.270 TYP |
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10/04/01 |
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2325 Orchard Parkway |
TITLE |
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DRAWING NO. |
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REV. |
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44J, 44-lead, Plastic J-leaded Chip Carrier (PLCC) |
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44J |
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B |
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R San Jose, CA 95131 |
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304 ATmega8535(L)
2502F–AVR–06/04
ATmega8535(L)
44M1-A
D
Marked Pin# 1 ID
E
SEATING PLANE
A1
TOP VIEW
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A3 |
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A |
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L |
Pin #1 Corner |
SIDE VIEW |
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D2 |
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COMMON DIMENSIONS |
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(Unit of Measure = mm) |
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E2 |
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SYMBOL |
MIN |
NOM |
MAX NOTE |
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A |
0.80 |
0.90 |
1.00 |
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A1 |
– |
0.02 |
0.05 |
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A3 |
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0.25 REF |
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b |
0.18 |
0.23 |
0.30 |
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D |
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7.00 BSC |
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b |
e |
D2 |
5.00 |
5.20 |
5.40 |
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E |
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7.00 BSC |
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BOTTOM VIEW |
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E2 |
5.00 |
5.20 |
5.40 |
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e |
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0.50 BSC |
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L |
0.35 |
0.55 |
0.75 |
Notes: 1. JEDEC Standard MO-220, Fig. 1 (SAW Singulation) VKKD-1.
01/15/03
TITLE
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2325 Orchard Parkway |
44M1, 44-pad, 7 x 7 x 1.0 mm Body, Lead Pitch 0.50 mm |
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San Jose, CA 95131 |
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R |
Micro Lead Frame Package (MLF) |
DRAWING NO. REV.
44M1 C
305
2502F–AVR–06/04