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Timer/Counter Prescaler Figure 44. Prescaler for Timer/Counter0

clkOSC

 

 

 

clkT0S

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10-BIT T/C PRESCALER

 

 

TOSC1

 

 

 

 

 

Clear

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

/8

 

 

/32

/64

/128

/256

/1024

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

T0S

 

T0S

T0S

 

 

 

 

 

 

 

 

 

 

T0S

T0S

T0S

AS0

 

 

 

 

 

 

 

clk

 

clk

clk

clk

clk

clk

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PSR0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CS00

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CS01

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CS02

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Special Function IO Register –

SFIOR

TIMER/COUNTER0 CLOCK SOURCE clkT0

The clock source for Timer/Counter0 is named clkT0S. clkT0S is by default connected to the main system clock clkOSC. By setting the AS0 bit in ASSR, Timer/Counter0 is asynchronously clocked from the TOSC1 pin. This enables use of Timer/Counter0 as a Real Time Counter (RTC). When AS0 is set, pins TOSC1 and TOSC2 are disconnected from Port C. A crystal can then be connected between the TOSC1 and TOSC2 pins to serve as an independent clock source for Timer/Counter0. The oscillator is optimized for use with a 32.768 kHz crystal. Applying an external clock source to TOSC1 is not recommended.

For Timer/Counter0, the possible prescaled selections are: clkT0S/8, clkT0S/32, clkT0S/64,

clkT0S/128, clkT0S/256, and clkT0S/1024. Additionally, clkT0S as well as 0 (stop) may be selected. Setting the PSR0 bit in SFIOR resets the prescaler. This allows the user to

operate with a predictable prescaler.

Bit

7

6

5

4

3

2

1

0

 

 

TSM

ADHSM

ACME

PUD

PSR0

PSR321

SFIOR

Read/Write

R/W

R

R

R/W

R/W

R/W

R/W

R/W

 

Initial value

0

0

0

0

0

0

0

0

 

• Bit 7 - TSM: Timer/Counter Synchronization Mode

Writing TSM to one, PSR0 and PSR321 becomes registers that hold their value until rewritten, or the TSM bit is written zero. This mode is useful for synchronizing timer/counters. By setting both TSM and the appropriate PSR bit(s), the appropriate timer/counters are halted, and can be configured to same value without the risk of one of them advancing during configuration. When the TSM bit written zero, the Timer/Counters start counting simultaneously.

104 ATmega128(L)

2467B–09/01

ATmega128(L)

• Bit 1 - PSR0: Prescaler Reset Timer/Counter0

When this bit is written to one, the Timer/Counter0 prescaler will be reset. The bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will have no effect. This bit will always be read as zero if Timer/Counter0 is clocked by the internal CPU clock. If this bit is written when Timer/Counter0 is operating in asynchronous mode, the bit will remain one until the prescaler has been reset.

105

2467B–09/01

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