- •Features
- •Pin Configuration
- •Description
- •Block Diagram
- •Pin Descriptions
- •AVCC
- •Port A (PA7..PA0)
- •Port B (PB7..PB0)
- •XTAL1
- •XTAL2
- •Resources
- •AVR CPU Core
- •Architectural Overview
- •I/O Direct
- •Data Direct
- •Data Indirect with Displacement
- •Data Indirect
- •Memories
- •SRAM Data Memory
- •EEPROM Data Memory
- •EEPROM Read/Write Access
- •I/O Memory
- •Clock Systems and their Distribution
- •Clock Sources
- •Default Clock Source
- •Crystal Oscillator
- •External RC Oscillator
- •External Clock
- •Power-on Reset
- •External Reset
- •Brown-out Detection
- •Watchdog Reset
- •Idle Mode
- •Power-down Mode
- •Standby Mode
- •Analog to Digital Converter
- •Analog Comparator
- •Brown-out Detector
- •Internal Voltage Reference
- •Watchdog Timer
- •Port Pins
- •I/O Ports
- •Introduction
- •Configuring the Pin
- •Reading the Pin Value
- •Unconnected Pins
- •Alternate Port Functions
- •Alternate Functions of Port A
- •Alternate Functions Of Port B
- •Register Description for I/O Ports
- •Interrupts
- •Interrupt Vectors
- •Interrupt Handling
- •Interrupt Response Time
- •External Interrupt
- •Pin Change Interrupt
- •Timer/Counters
- •Timer/Counter0 Prescaler
- •Timer/Counter1 Prescaler
- •8-bit Timer/Counter0
- •8-bit Timer/Counter1
- •Timer/Counter1 in PWM Mode
- •Watchdog Timer
- •Overview
- •Register Descriptions
- •Functional Descriptions
- •Three-wire Mode
- •SPI Slave Operation Example
- •Two-wire Mode
- •Start Condition Detector
- •Alternative USI Usage
- •4-bit Counter
- •12-bit Timer/Counter
- •Software Interrupt
- •Analog Comparator
- •Analog to Digital Converter
- •Features
- •Operation
- •Changing Channel or Reference Selection
- •ADC Conversion Result
- •ADLAR = 0
- •ADLAR = 1
- •Fuse Bits
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Page Size
- •Signal Names
- •Parallel Programming
- •Enter Programming Mode
- •Chip Erase
- •Programming the Flash
- •Programming the EEPROM
- •Reading the Flash
- •Reading the EEPROM
- •Programming the Lock Bits
- •Reading the Signature Bytes
- •Reading the Calibration Byte
- •Serial Downloading
- •Data Polling Flash
- •Data Polling EEPROM
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •DC Characteristics
- •External Clock Drive Waveforms
- •External Clock Drive
- •ADC Characteristics
- •Active Supply Current
- •Idle Supply Current
- •Power-down Supply Current
- •Standby Supply Current
- •Pin Pull-up
- •Internal Oscillator Speed
- •Register Summary
- •Instruction Set Summary
- •Ordering Information
- •Packaging Information
- •Errata
- •ATtiny26 Rev. B/C/D
- •Table of Contents
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ATtiny26(L) |
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Pin Descriptions |
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VCC |
Digital supply voltage pin. |
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GND |
Digital ground pin. |
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AVCC |
AVCC is the supply voltage pin for Port A and the A/D Converter (ADC). It should be |
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externally connected to VCC, even if the ADC is not used. If the ADC is used, it should be |
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connected to VCC through a low-pass filter. See page 96 for details on operating of the |
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ADC. |
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Port A (PA7..PA0) |
Port A is an 8-bit general purpose I/O port. PA7..PA0 are all I/O pins that can provide |
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internal pull-ups (selected for each bit). Port A has alternate functions as analog inputs |
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for the ADC and analog comparator and pin change interrupt as described in “Alternate |
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Port Functions” on page 48. |
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Port B (PB7..PB0) |
Port B is an 8-bit general purpose I/O port. PB6..0 are all I/O pins that can provide inter- |
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nal pull-ups (selected for each bit). PB7 is an I/O pin if not used as the reset. To use pin |
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PB7 as an I/O pin, instead of RESET pin, program (“0”) RSTDISBL Fuse. Port B has |
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alternate functions for the ADC, clocking, timer counters, USI, SPI programming, and |
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pin change interrupt as described in “Alternate Port Functions” on page 48. |
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pin. Reset pulses |
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An External Reset is generated by a low level on the PB7/RESET |
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longer than 50 ns will generate a reset, even if the clock is not running. Shorter pulses |
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are not guaranteed to generate a reset. |
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XTAL1 |
Input to the inverting oscillator amplifier and input to the internal clock operating circuit. |
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XTAL2 |
Output from the inverting oscillator amplifier. |
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1477J–AVR–06/07