Parallel Programming

Enter Programming Mode	The following algorithm puts the device in parallel programming mode:
	Step 2-7 must be completed within 64ms.
	1.	Set Prog_enable pins listed in Table 55 on page 112, RESET and Vcc to 0V.
	2.	Apply 4.5 - 5.5V between Vcc/AVcc and GND.
	3.	Wait at least 60us.
	4.	Apply between 4.5V - 5.5V (Same as on Vcc/AVcc) to RESET pin.
	5.	Wait at least 20us.
	6.	Apply between 11.5V - 12.5V to RESET pin.
	7.	Wait at least 10us.
	8.	Program fuses to internal clock mode, 8 MHz, with 64ms delay. (CKSEL[3..0] =
		0100, SUT[1..0] = 10). If Lock bits are programmed, a Chip Erase command
		must be executed before changing the fuses.
	9.	Exit Programming mode by power the device down or by bringing RESET pin to
		0V.
	10.	Repeat step 1 to 7 too re-enter programming mode.
Considerations for Efficient	The loaded command and address are retained in the device during programming. For
Programming	efficient programming, the following should be considered.
	•	The command needs only be loaded once when writing or reading multiple memory
		locations.
	•	Skip writing the data value $FF, that is the contents of the entire EEPROM (unless
		the EESAVE Fuse is programmed) and Flash after a Chip Erase.
	•	Address high byte needs only be loaded before programming or reading a new 256-
		word window in Flash or 256-byte EEPROM. This consideration also applies to
		Signature bytes reading.

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	Chip Erase	The Chip Erase will erase the Flash and EEPROM(1) memories plus Lock bits. The Lock
		bits are not reset until the program memory has been completely erased. The Fuse bits
		are not changed. A Chip Erase must be performed before the Flash and/or EEPROM
		are reprogrammed.
		Note: 1. The EEPROM memory is preserved during Chip Erase if the EESAVE Fuse is
				programmed.
		Load Command “Chip Erase”
		1.	Set XA1, XA0 to “10”. This enables command loading.
		2.	Set BS1 to “0”.
		3.	Set DATA to “1000 0000”. This is the command for Chip Erase.
		4.	Give XTAL1 a positive pulse. This loads the command.
		5.	Give						goes low.
				WR	a negative pulse. This starts the Chip Erase. RDY/BSY
		6.					goes high before loading a new command.
			Wait until RDY/BSY
	Programming the Flash	The Flash is organized in pages, see Table 52 on page 111. When programming the
		Flash, the program data is latched into a page buffer. This allows one page of program

data to be programmed simultaneously. The following procedure describes how to program the entire Flash memory:

A. Load Command "Write Flash"

1.Set XA1, XA0 to “10”. This enables command loading.

2.Set BS1 to “0”.

3.Set DATA to “0001 0000”. This is the command for Write Flash.

4.Give XTAL1 a positive pulse. This loads the command.

B. Load Address Low byte

1.Set XA1, XA0 to “00”. This enables address loading.

2.Set BS1 to “0”. This selects low address.

3.Set DATA = Address low byte ($00 - $FF).

4.Give XTAL1 a positive pulse. This loads the address low byte.

C. Load Data Low Byte

1.Set XA1, XA0 to “01”. This enables data loading.

2.Set DATA = Data low byte ($00 - $FF).

3.Give XTAL1 a positive pulse. This loads the data byte.

D. Load Data High Byte

1.Set BS1 to “1”. This selects high data byte.

2.Set XA1, XA0 to “01”. This enables data loading.

3.Set DATA = Data high byte ($00 - $FF).

4.Give XTAL1 a positive pulse. This loads the data byte.

E. Repeat B through D until the entire buffer is filled or until all data within the page is loaded.

While the lower bits in the address are mapped to words within the page, the higher bits address the pages within the FLASH. This is illustrated in Figure 59 on page 116. Note that if less than 8 bits are required to address words in the page (pagesize < 256), the most significant bit(s) in the address low byte are used to address the page when performing a page write.

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F. Load Address High byte

1.Set XA1, XA0 to “00”. This enables address loading.

2.Set BS1 to “1”. This selects high address.

3.Set DATA = Address high byte ($00 - $03).

4.Give XTAL1 a positive pulse. This loads the address high byte.

G. Program Page

1.Set BS1 to “0”.

2.Give WR a negative pulse. This starts programming of the entire page of data. RDY/BSYgoes low.

3.Wait until RDY/BSY goes high. (See Figure 60 for signal waveforms.)

H.Repeat B through G until the entire Flash is programmed or until all data has been programmed.

I.End Page Programming

1.Set XA1, XA0 to “10”. This enables command loading.

2.Set DATA to “0000 0000”. This is the command for No Operation.

3.Give XTAL1 a positive pulse. This loads the command, and the internal write signals are reset.

Figure 59. Addressing the Flash which is Organized in Pages(1)

PROGRAM	PCMSB	PAGEMSB
	PCPAGE	PCWORD
COUNTER
PAGE ADDRESS		WORD ADDRESS
WITHIN THE FLASH		WITHIN A PAGE
PROGRAM MEMORY		PAGE	PCWORD[PAGEMSB:0]:
PAGE		INSTRUCTION WORD	00
			01
			02

PAGEEND

Note: 1. PCPAGE and PCWORD are listed in Table 52 on page 111.

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Figure 60. Programming the Flash Waveforms(1)

							E
		A	B	C	D	B	C	D	F	G
	DATA	$10	ADDR. LOW	DATA LOW	DATA HIGH ADDR. LOW		DATA LOW	DATA HIGH ADDR. HIGH		XX
XA1/BS2
	XA0
PAGEL/BS1
	XTAL1
	WR
RDY/BSY
RESET	+12V
	OE
Note:	1. “XX” is don’t care. The letters refer to the programming description above.

Programming the EEPROM The EEPROM is organized in pages, see Table 53 on page 111. When programming the EEPROM, the program data is latched into a page buffer. This allows one page of data to be programmed simultaneously. The programming algorithm for the EEPROM data memory is as follows (refer to “Programming the Flash” on page 115 for details on Command, Address and Data loading):

1.A: Load Command “0001 0001”.

2.B: Load Address Low Byte ($00 - $FF).

3.C: Load Data ($00 - $FF).

J:Repeat 2 and 3 until the entire buffer is filled

K:Program EEPROM page

1.Set BS1 to “0”.

2.Give WR a negative pulse. This starts programming of the EEPROM page. RDY/BSY goes low.

3.Wait until to RDY/BSY goes high before programming the next page. (See Figure 61 for signal waveforms.)

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