- •Features
- •Pin Configuration
- •Description
- •Block Diagram
- •Pin Descriptions
- •AVCC
- •Port A (PA7..PA0)
- •Port B (PB7..PB0)
- •XTAL1
- •XTAL2
- •Resources
- •AVR CPU Core
- •Architectural Overview
- •I/O Direct
- •Data Direct
- •Data Indirect with Displacement
- •Data Indirect
- •Memories
- •SRAM Data Memory
- •EEPROM Data Memory
- •EEPROM Read/Write Access
- •I/O Memory
- •Clock Systems and their Distribution
- •Clock Sources
- •Default Clock Source
- •Crystal Oscillator
- •External RC Oscillator
- •External Clock
- •Power-on Reset
- •External Reset
- •Brown-out Detection
- •Watchdog Reset
- •Idle Mode
- •Power-down Mode
- •Standby Mode
- •Analog to Digital Converter
- •Analog Comparator
- •Brown-out Detector
- •Internal Voltage Reference
- •Watchdog Timer
- •Port Pins
- •I/O Ports
- •Introduction
- •Configuring the Pin
- •Reading the Pin Value
- •Unconnected Pins
- •Alternate Port Functions
- •Alternate Functions of Port A
- •Alternate Functions Of Port B
- •Register Description for I/O Ports
- •Interrupts
- •Interrupt Vectors
- •Interrupt Handling
- •Interrupt Response Time
- •External Interrupt
- •Pin Change Interrupt
- •Timer/Counters
- •Timer/Counter0 Prescaler
- •Timer/Counter1 Prescaler
- •8-bit Timer/Counter0
- •8-bit Timer/Counter1
- •Timer/Counter1 in PWM Mode
- •Watchdog Timer
- •Overview
- •Register Descriptions
- •Functional Descriptions
- •Three-wire Mode
- •SPI Slave Operation Example
- •Two-wire Mode
- •Start Condition Detector
- •Alternative USI Usage
- •4-bit Counter
- •12-bit Timer/Counter
- •Software Interrupt
- •Analog Comparator
- •Analog to Digital Converter
- •Features
- •Operation
- •Changing Channel or Reference Selection
- •ADC Conversion Result
- •ADLAR = 0
- •ADLAR = 1
- •Fuse Bits
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Page Size
- •Signal Names
- •Parallel Programming
- •Enter Programming Mode
- •Chip Erase
- •Programming the Flash
- •Programming the EEPROM
- •Reading the Flash
- •Reading the EEPROM
- •Programming the Lock Bits
- •Reading the Signature Bytes
- •Reading the Calibration Byte
- •Serial Downloading
- •Data Polling Flash
- •Data Polling EEPROM
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •DC Characteristics
- •External Clock Drive Waveforms
- •External Clock Drive
- •ADC Characteristics
- •Active Supply Current
- •Idle Supply Current
- •Power-down Supply Current
- •Standby Supply Current
- •Pin Pull-up
- •Internal Oscillator Speed
- •Register Summary
- •Instruction Set Summary
- •Ordering Information
- •Packaging Information
- •Errata
- •ATtiny26 Rev. B/C/D
- •Table of Contents
Fuse Bits |
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The ATtiny26 has two Fuse bytes. Table 50 and Table 51 describe briefly the functional- |
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ity of all the fuses and how they are mapped into the fuse bytes. Note that the fuses are |
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read as logical zero, “0”, if they are programmed. |
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Table 50. Fuse High Byte |
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Fuse High Byte |
Bit No |
Description |
Default Value |
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7 |
– |
1 |
(unprogrammed) |
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6 |
– |
1 |
(unprogrammed) |
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5 |
– |
1 |
(unprogrammed) |
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RSTDISBL(2) |
4 |
Select if PB7 is I/O pin or |
1 |
(unprogrammed, PB7 is |
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RESET pin |
RESET pin) |
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SPIEN(1) |
3 |
Enable Serial Program |
0 |
(programmed, SPI prog. |
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and Data Downloading |
enabled) |
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EEPROM memory is |
1 |
(unprogrammed, EEPROM not |
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EESAVE |
2 |
preserved through the Chip |
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preserved) |
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Erase |
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BODLEVEL |
1 |
Brown out detector trigger |
1 |
(unprogrammed) |
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level |
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BODEN |
0 |
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1 |
(unprogrammed, BOD |
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Brown out detector enable |
disabled) |
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Notes: 1. The SPIEN Fuse is not accessible in serial programming mode.
2.When programming the RSTDISBL Fuse, Parallel Programming has to be used to change fuses or perform further programming.
Table 51. Fuse Low Byte
Fuse Low Byte |
Bit No |
Description |
Default Value |
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PLLCK |
7 |
Use PLL for internal clock |
1 |
(unprogrammed) |
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CKOPT(3) |
6 |
Oscillator options |
1 |
(unprogrammed) |
SUT1 |
5 |
Select start-up time |
1 |
(unprogrammed)(1) |
SUT0 |
4 |
Select start-up time |
0 |
(programmed)(1) |
CKSEL3 |
3 |
Select Clock source |
0 |
(programmed)(2) |
CKSEL2 |
2 |
Select Clock source |
0 |
(programmed)(2) |
CKSEL1 |
1 |
Select Clock source |
0 |
(programmed)(2) |
CKSEL0 |
0 |
Select Clock source |
1 (unprogrammed)(2) |
Notes: 1. The default value of SUT1..0 results in maximum start-up time. See Table 12 on page 30 for details.
2.The default setting of CKSEL3..0 results in internal RC Oscillator at 1 MHz. See Table 3 on page 26 for details.
3.The CKOPT Fuse functionality depends on the setting of the CKSEL bits. See “System Clock and Clock Options” on page 24 for details.
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
110 ATtiny26(L)
1477J–AVR–06/07