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Рыбницкий Филиал Приднестровского Государственного Университета им.Т.Г.Шевченко

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Figure 61. Programming the EEPROM Waveforms

DATA

$11

ADDR. LOW

DATA

ADDR. LOW

DATA

XA1/BS2

XA0

PAGEL/BS1

XTAL1

RDY/BSY

RESET

+12V

Reading the Flash

The algorithm for reading the Flash memory is as follows (refer to “Programming the

Flash” on page 115 for details on Command and Address loading):

1.A: Load Command “0000 0010”.

2.F: Load Address High Byte ($00 - $03).

3.B: Load Address Low Byte ($00 - $FF).

4.Set OE to “0”, and BS1 to “0”. The Flash word low byte can now be read at DATA.

5.Set BS1 to “1”. The Flash word high byte can now be read at DATA.

6.Set OE to “1”.


Reading the EEPROM	The algorithm for reading the EEPROM memory is as follows (refer to “Programming the
	Flash” on page 115 for details on Command and Address loading):
	1.	A: Load Command “0000 0011”.
	2.	B: Load Address Low Byte ($00 - $FF).
	3.	Set					to “0”, and BS1 to “0”. The EEPROM Data byte can now be read at
				OE
		DATA.
	4.	Set				to “1”.
			OE
Programming the Fuse Low	The algorithm for programming the Fuse Low bits is as follows (refer to “Programming
Bits	the Flash” on page 115 for details on Command and Data loading):
	1.	A: Load Command “0100 0000”.
	2.	C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit.
	3.	Set BS1 and BS2 to “0”.
	4.	Give							to go high.
					WR			a negative pulse and wait for RDY/BSY

118 ATtiny26(L)

1477J–AVR–06/07

						ATtiny26(L)

Programming the Fuse High
	The algorithm for programming the Fuse high bits is as follows (refer to “Programming

Bits	the Flash” on page 115 for details on Command and Data loading):
	1.	A: Load Command “0100 0000”.
	2.	C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit.
	3.	Set BS1 to “1” and BS2 to “0”. This selects high data byte.
	4.	Give			to go high.
	4.	Give	WR	a negative pulse and wait for RDY/BSY	to go high.
	5.	Set BS1 to “0”. This selects low data byte.

Figure 62. Programming the Fuse Waveforms

			Write Fuse Low Byte			Write Fuse High Byte
	A	C		A	C
DATA	$40	DATA	XX	$40	DATA	XX
DATA

XA1/BS2

XA0

PAGEL/BS1

XTAL1

RDY/BSY

RESET +12V

Programming the Lock Bits The algorithm for programming the Lock bits is as follows (refer to “Programming the Flash” on page 115 for details on Command and Data loading):

1.A: Load Command “0010 0000”.

2.C: Load Data Low Byte. Bit n = “0” programs the Lock bit.

3.Give WR a negative pulse and wait for RDY/BSY to go high.

The Lock bits can only be cleared by executing Chip Erase.


Reading the Fuse and Lock	The algorithm for reading the Fuse and Lock bits is as follows (refer to “Programming
Bits	the Flash” on page 115 for details on Command loading):
	1.	A: Load Command “0000 0100”.
	2.	Set						to “0”, BS2 to “0”, and BS1 to “0”. The status of the Fuse Low bits can
					OE
		now be read at DATA (“0” means programmed).
	3.	Set					to “0”, BS2 to “1”, and BS1 to “1”. The status of the Fuse High bits can
				OE
		now be read at DATA (“0” means programmed).
	4.	Set				to “0”, BS2 to “0”, and BS1 to “1”. The status of the Lock bits can now be
			OE
		read at DATA (“0” means programmed).
	5.	Set				to “1”.
			OE

119

1477J–AVR–06/07

Figure 63. Mapping Between BS1, BS2 and the Fuseand Lock-bits During Read

Fuse Low Byte				0	DATA
Fuse Low Byte				0

Lock Bits		0		1




			BS1
Fuse High Byte	1		BS1

BS2

Reading the Signature Bytes The algorithm for reading the Signature bytes is as follows (refer to Programming the Flash for details on Command and Address loading):

1.A: Load Command “0000 1000”.

2.B: Load Address Low Byte ($00 - $02).

3.Set OE to “0” and BS1 to “0”. The selected Signature byte can now be read at DATA.

4.Set OE to “1”.

Reading the Calibration Byte The algorithm for reading the Calibration byte is as follows (refer to Programming the Flash for details on Command and Address loading):

1.A: Load Command “0000 1000”.

2.B: Load Address Low Byte.

3.Set OE to “0” and BS1 to “1”. The Calibration byte can now be read at DATA.

4.Set OE to “1”.

Parallel Programming

Figure 64. Parallel Programming Timing, Including some General Timing

Characteristics

Requirements

tXLWL

XTAL1

tXHXL

Data & Contol

tDVXH

tXLDX

(DATA, XA0, XA1/BS2

PAGEL/BS1)

tBVWL

tWLBX

tWLWH

WLRL

RDY/BSY

tWLRH

120 ATtiny26(L)

1477J–AVR–06/07

ATtiny26(L)

Figure 65. Parallel Programming Timing, Loading Sequence with Timing

Requirements(1)

LOAD ADDRESS

LOAD DATA

LOAD ADDRESS

(LOW BYTE)

(HIGH BYTE)

(LOW BYTE)

XTAL1

t XLXH

PAGEL/BS1

DATA

ADDR0 (Low Byte)

DATA (Low Byte)

DATA (High Byte)

ADDR1 (Low Byte)

XA0

XA1/BS2

Note: 1.

The timing requirements shown in Figure 64 (i.e., tDVXH, tXHXL, and tXLDX) also apply

to loading operation.

Figure 66. Parallel Programming Timing, Reading Sequence (Within the Same Page)

with Timing Requirements()

LOAD ADDRESS

READ DATA

LOAD ADDRESS

(LOW BYTE)

(HIGH BYTE)

(LOW BYTE)

tXLOL

XTAL1

tBHDV

PAGEL/BS1

tOLDV

tOHDZ

DATA

ADDR0 (Low Byte)

DATA (Low Byte)

DATA (High Byte)

ADDR1 (Low Byte)

XA0

XA1/BS2

Note: 1. The timing requirements shown in Figure 64 (i.e. tDVXH, tXHXL, and tXLDX) also apply to reading operation.

121

1477J–AVR–06/07

Table 58.

Parallel Programming Characteristics, VCC = 5V ± 10%

Symbol

Parameter

Min

Typ

Max

Units

VPP

Programming Enable Voltage

11.5

12.5

IPP

Programming Enable Current

250

μA

tDVXH

Data and Control Valid before XTAL1 High

tXLXH

XTAL1 Low to XTAL1 High

200

tXHXL

XTAL1 Pulse Width High

150

tXLDX

Data and Control Hold after XTAL1 Low

tXLWL

XTAL1 Low to

Low

tWLBX

BS2/1 Hold after

Low

tBVWL

BS1 Valid to

Low

tWLWH

Pulse Width Low

150

tWLRL

Low

μs

Low to RDY/BSY

tWLRH

High(1)

3.7

4.5

Low to RDY/BSY

tWLRH_CE

High for Chip Erase(2)

7.5

Low to RDY/BSY

tXLOL

XTAL1 Low to

Low

tBVDV

BS1 Valid to DATA valid

250

tOLDV

Low to DATA Valid

250

tOHDZ

High to DATA Tri-stated

250

Notes: 1. tWLRH is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits commands.

2.tWLRH_CE is valid for the Chip Erase command.

122 ATtiny26(L)

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Reading the Flash

Reading the EEPROM

Programming the Lock Bits The algorithm for programming the Lock bits is as follows (refer to “Programming the Flash” on page 115 for details on Command and Data loading):

Reading the Signature Bytes The algorithm for reading the Signature bytes is as follows (refer to Programming the Flash for details on Command and Address loading):

Reading the Calibration Byte The algorithm for reading the Calibration byte is as follows (refer to Programming the Flash for details on Command and Address loading):