- •Features
- •Pin Configurations
- •Disclaimer
- •Overview
- •Block Diagram
- •Pin Descriptions
- •Port B (PB5..PB0)
- •RESET
- •AVR CPU Core
- •Introduction
- •Architectural Overview
- •Status Register
- •Stack Pointer
- •Interrupt Response Time
- •SRAM Data Memory
- •Data Memory Access Times
- •EEPROM Data Memory
- •EEPROM Read/Write Access
- •Atomic Byte Programming
- •Split Byte Programming
- •Erase
- •Write
- •I/O Memory
- •Clock Systems and their Distribution
- •CPU Clock – clkCPU
- •I/O Clock – clkI/O
- •Flash Clock – clkFLASH
- •ADC Clock – clkADC
- •Clock Sources
- •Default Clock Source
- •External Clock
- •System Clock Prescaler
- •Switching Time
- •Idle Mode
- •Power-down Mode
- •Analog to Digital Converter
- •Analog Comparator
- •Brown-out Detector
- •Internal Voltage Reference
- •Watchdog Timer
- •Port Pins
- •Resetting the AVR
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Brown-out Detection
- •Watchdog Reset
- •Watchdog Timer
- •Timed Sequences for Changing the Configuration of the Watchdog Timer
- •Safety Level 1
- •Safety Level 2
- •Interrupts
- •I/O Ports
- •Introduction
- •Configuring the Pin
- •Toggling the Pin
- •Reading the Pin Value
- •Unconnected Pins
- •Alternate Port Functions
- •Alternate Functions of Port B
- •Register Description for I/O-Ports
- •Port B Data Register – PORTB
- •External Interrupts
- •8-bit Timer/Counter0 with PWM
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Output Compare Unit
- •Force Output Compare
- •Modes of Operation
- •Normal Mode
- •Fast PWM Mode
- •Phase Correct PWM Mode
- •Prescaler Reset
- •External Clock Source
- •Analog Comparator
- •Analog Comparator Multiplexed Input
- •Features
- •Operation
- •Starting a Conversion
- •Changing Channel or Reference Selection
- •ADC Input Channels
- •ADC Voltage Reference
- •ADC Noise Canceler
- •Analog Input Circuitry
- •ADC Accuracy Definitions
- •ADC Conversion Result
- •ADLAR = 0
- •ADLAR = 1
- •debugWIRE On-chip Debug System
- •Features
- •Overview
- •Physical Interface
- •Software Break Points
- •Limitations of debugWIRE
- •debugWIRE Related Register in I/O Memory
- •debugWire Data Register – DWDR
- •Performing a Page Write
- •Reading the Fuse and Lock Bits from Software
- •Preventing Flash Corruption
- •Fuse Bytes
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Page Size
- •Serial Downloading
- •Data Polling Flash
- •Data Polling EEPROM
- •Chip Erase
- •Programming the Flash
- •Programming the EEPROM
- •Reading the Flash
- •Reading the EEPROM
- •Power-off sequence
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •External Clock Drive Waveforms
- •External Clock Drive
- •ADC Characteristics – Preliminary Data
- •Active Supply Current
- •Idle Supply Current
- •Power-down Supply Current
- •Pin Pull-up
- •Register Summary
- •Instruction Set Summary
- •Ordering Information
- •Packaging Information
- •Erratas
- •Table of Contents
Interrupts
Interrupt Vectors in
ATtiny13
This section describes the specifics of the interrupt handling as performed in ATtiny13. For a general explanation of the AVR interrupt handling, refer to “Reset and Interrupt Handling” on page 9.
Table 19. Reset and Interrupt Vectors
Vector |
Program |
|
|
No. |
Address |
Source |
Interrupt Definition |
|
|
|
|
1 |
0x0000 |
RESET |
External Pin, Power-on Reset, Brown-out Reset, |
|
|
|
Watchdog Reset |
|
|
|
|
2 |
0x0001 |
INT0 |
External Interrupt Request 0 |
|
|
|
|
3 |
0x0002 |
PCINT0 |
Pin Change Interrupt Request 0 |
|
|
|
|
4 |
0x0003 |
TIM0_OVF |
Timer/Counter Overflow |
|
|
|
|
5 |
0x0004 |
EE_RDY |
EEPROM Ready |
|
|
|
|
6 |
0x0005 |
ANA_COMP |
Analog Comparator |
|
|
|
|
7 |
0x0006 |
TIM0_COMPA |
Timer/Counter Compare Match A |
|
|
|
|
8 |
0x0007 |
TIM0_COMPB |
Timer/Counter Compare Match B |
|
|
|
|
9 |
0x0008 |
WDT |
Watchdog Time-out |
|
|
|
|
10 |
0x0009 |
ADC |
ADC Conversion Complete |
|
|
|
|
If the program never enables an interrupt source, the Interrupt Vectors are not used, and regular program code can be placed at these locations. The most typical and general program setup for the Reset and Interrupt Vector Addresses in ATtiny13 is:
Address |
Labels |
Code |
|
Comments |
|
0x0000 |
|
rjmp |
RESET |
; |
Reset Handler |
0x0001 |
|
rjmp |
EXT_INT0 |
; |
IRQ0 Handler |
0x0002 |
|
rjmp |
PCINT0 |
; |
PCINT0 Handler |
0x0003 |
|
rjmp |
TIM0_OVF |
; |
Timer0 Overflow Handler |
0x0004 |
|
rjmp |
EE_RDY |
; |
EEPROM Ready Handler |
0x0005 |
|
rjmp |
ANA_COMP |
; |
Analog Comparator Handler |
0x0006 |
|
rjmp |
TIM0_COMPA |
; |
Timer0 CompareA Handler |
0x0007 |
|
rjmp |
TIM0_COMPB |
; |
Timer0 CompareB Handler |
0x0008 |
|
rjmp |
WATCHDOG |
; |
Watchdog Interrupt Handler |
0x0009 |
|
rjmp |
ADC |
; ADC Conversion Handler |
|
; |
|
|
|
|
|
0x000A |
RESET: ldi |
r16, low(RAMEND) ; |
Main program start |
||
0x000B |
out |
SPL,r16 |
; |
Set Stack Pointer to top of RAM |
|
0x000C |
|
sei |
|
; |
Enable interrupts |
0x000D |
<instr> xxx |
|
|
|
|
... |
... |
... |
... |
|
|
40 ATtiny13
2535A–AVR–06/03