- •Features
- •Pin Configurations
- •Disclaimer
- •Overview
- •Block Diagram
- •Pin Descriptions
- •Port B (PB5..PB0)
- •RESET
- •AVR CPU Core
- •Introduction
- •Architectural Overview
- •Status Register
- •Stack Pointer
- •Interrupt Response Time
- •SRAM Data Memory
- •Data Memory Access Times
- •EEPROM Data Memory
- •EEPROM Read/Write Access
- •Atomic Byte Programming
- •Split Byte Programming
- •Erase
- •Write
- •I/O Memory
- •Clock Systems and their Distribution
- •CPU Clock – clkCPU
- •I/O Clock – clkI/O
- •Flash Clock – clkFLASH
- •ADC Clock – clkADC
- •Clock Sources
- •Default Clock Source
- •External Clock
- •System Clock Prescaler
- •Switching Time
- •Idle Mode
- •Power-down Mode
- •Analog to Digital Converter
- •Analog Comparator
- •Brown-out Detector
- •Internal Voltage Reference
- •Watchdog Timer
- •Port Pins
- •Resetting the AVR
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Brown-out Detection
- •Watchdog Reset
- •Watchdog Timer
- •Timed Sequences for Changing the Configuration of the Watchdog Timer
- •Safety Level 1
- •Safety Level 2
- •Interrupts
- •I/O Ports
- •Introduction
- •Configuring the Pin
- •Toggling the Pin
- •Reading the Pin Value
- •Unconnected Pins
- •Alternate Port Functions
- •Alternate Functions of Port B
- •Register Description for I/O-Ports
- •Port B Data Register – PORTB
- •External Interrupts
- •8-bit Timer/Counter0 with PWM
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Output Compare Unit
- •Force Output Compare
- •Modes of Operation
- •Normal Mode
- •Fast PWM Mode
- •Phase Correct PWM Mode
- •Prescaler Reset
- •External Clock Source
- •Analog Comparator
- •Analog Comparator Multiplexed Input
- •Features
- •Operation
- •Starting a Conversion
- •Changing Channel or Reference Selection
- •ADC Input Channels
- •ADC Voltage Reference
- •ADC Noise Canceler
- •Analog Input Circuitry
- •ADC Accuracy Definitions
- •ADC Conversion Result
- •ADLAR = 0
- •ADLAR = 1
- •debugWIRE On-chip Debug System
- •Features
- •Overview
- •Physical Interface
- •Software Break Points
- •Limitations of debugWIRE
- •debugWIRE Related Register in I/O Memory
- •debugWire Data Register – DWDR
- •Performing a Page Write
- •Reading the Fuse and Lock Bits from Software
- •Preventing Flash Corruption
- •Fuse Bytes
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Page Size
- •Serial Downloading
- •Data Polling Flash
- •Data Polling EEPROM
- •Chip Erase
- •Programming the Flash
- •Programming the EEPROM
- •Reading the Flash
- •Reading the EEPROM
- •Power-off sequence
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •External Clock Drive Waveforms
- •External Clock Drive
- •ADC Characteristics – Preliminary Data
- •Active Supply Current
- •Idle Supply Current
- •Power-down Supply Current
- •Pin Pull-up
- •Register Summary
- •Instruction Set Summary
- •Ordering Information
- •Packaging Information
- •Erratas
- •Table of Contents
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ATtiny13 |
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Latching of Fuses |
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The fuse values are latched when the device enters programming mode and changes of |
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the fuse values will have no effect until the part leaves Programming mode. This does |
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not apply to the EESAVE Fuse which will take effect once it is programmed. The fuses |
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are also latched on Power-up in Normal mode. |
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Signature Bytes |
All Atmel microcontrollers have a three-byte signature code which identifies the device. |
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This code can be read in both serial and High-voltage Programming mode, also when |
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the device is locked. The three bytes reside in a separate address space. |
For the ATtiny13 the signature bytes are:
1.0x000: 0x1E (indicates manufactured by Atmel).
2.0x001: 0x90 (indicates 1 KB Flash memory).
3.0x002: 0x07 (indicates ATtiny13 device when 0x001 is 0x90).
Calibration Byte |
Signature area of the ATtiny13 has one byte of calibration data for the internal RC Oscil- |
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lator. This byte resides in the high byte of address 0x000. During reset, this byte is |
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automatically written into the OSCCAL Register to ensure correct frequency of the cali- |
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brated RC Oscillator. |
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Page Size |
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Table 47. No. of Words in a Page and No. of Pages in the Flash |
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Flash Size |
Page Size |
PCWORD |
No. of Pages |
PCPAGE |
PCMSB |
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512 words (1K byte) |
16 words |
PC[3:0] |
32 |
PC[8:4] |
8 |
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Table 48. No. of Words in a Page and No. of Pages in the EEPROM |
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EEPROM Size |
Page Size |
PCWORD |
No. of Pages |
PCPAGE |
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EEAMSB |
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64 bytes |
4 bytes |
EEA[1:0] |
16 |
EEA[5:2] |
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5 |
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101
2535A–AVR–06/03