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Fuse Bytes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The ATtiny13 has two Fuse bytes. Table 45 and Table 46 describe briefly the functional-

 

ity of all the fuses and how they are mapped into the Fuse bytes. Note that the fuses are

 

read as logical zero, “0”, if they are programmed.

 

 

Table 45. Fuse High Byte

 

 

 

 

 

 

 

 

 

 

 

 

Fuse High Byte

Bit No

 

Description

Default Value

 

 

 

 

 

 

 

7

 

1 (unprogrammed)

 

 

 

 

 

 

 

6

 

1 (unprogrammed)

 

 

 

 

 

 

 

5

 

1 (unprogrammed)

 

 

 

 

 

 

 

SPMEN

4

 

SPM Enable

1 (unprogrammed)

 

 

 

 

 

 

 

DWEN(3)

3

 

debugWire Enable

1 (unprogrammed)

 

BODLEVEL1(1)

2

 

Brown-out Detector trigger level

1 (unprogrammed)

 

BODLEVEL0(1)

1

 

Brown-out Detector trigger level

1 (unprogrammed)

 

RSTDISBL(4)

0

 

External Reset disable

1 (unprogrammed)

Notes: 1. See Table 13 on page 32 for BODLEVEL Fuse decoding.

2.See “Alternate Functions of Port B” on page 48 for description of RSTDISBL and DWEN Fuses.

3.DWEN must be unprogrammed when Lock Bit security is required. See “Program And Data Memory Lock Bits” on page 99.

4.When programming the RSTDISBL Fuse, High-voltage Serial programming has to be used to change fuses to perform further programming.

Table 46. Fuse Low Byte

Fuse Low Byte

Bit No

Description

Default Value

 

 

 

 

 

SPIEN(1)

7

Enable Serial Program

0

(programmed, SPI prog.

and Data Downloading

enabled)

 

 

 

 

 

 

 

 

 

EEPROM memory is

1

(unprogrammed,

EESAVE

6

preserved through the

EEPROM not preserved)

 

 

Chip Erase

 

 

 

 

 

 

 

 

 

WDTON(2)

5

Watchdog Timer always

 

 

on

1

(unprogrammed)

 

 

 

 

 

 

 

CKDIV8(5)

4

Divide clock by 8

0

(programmed)

SUT1

3

Select start-up time

1

(unprogrammed)(3)

SUT0

2

Select start-up time

0

(programmed)(3)

CKSEL1

1

Select Clock source

1

(unprogrammed)(4)

CKSEL0

0

Select Clock source

0

(programmed)(4)

Notes: 1. The SPIEN Fuse is not accessible in SPI Programming mode.

2.See “Watchdog Timer Control Register – WDTCR” on page 35 for details.

3.The default value of SUT1..0 results in maximum start-up time for the default clock source. See Table 5 on page 22 for details.

4.The default setting of CKSEL1..0 results in internal RC Oscillator @ 9.6 MHz. See Table 4 on page 22 for details.

5.See “System Clock Prescaler” on page 24 for details.

The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.

100 ATtiny13

2535A–AVR–06/03

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