2D FIR Filter IP Core 5

2015.01.23

UG-VIPSUITE

Subscribe

Send Feedback

The 2D FIR Filter IP core performs 2D convolution using matrices of 3×3, 5×5, or 7×7 coefficients.

The 2D FIR Filter IP core retains full precision throughout the calculation while making efficient use of FPGA resources. With suitable coefficients, the IP core performs operations such as sharpening, smoothing, and edge detection. You can configure the 2D FIR Filter to change coefficient values at run time with an Avalon-MM slave interface.

The 2D FIR Filter IP core calculates an output pixel from the multiplication of input pixels in a filter size grid (kernel) by their corresponding coefficient in the filter. These values are summed together. To produce the output, the IP core:

1.Scales the input.

2.Removes the fractional bits.

3.Converts the input to the desired output data type.

4.Finally, constrains the output to a specified range.

The position of the output pixel corresponds to the mid-point of the kernel. If the kernel runs over the edge of an image, the IP core uses zeros for the out of range pixels.

The 2D FIR Filter IP core fully defines its input, output and coefficient data types.

•Input and output: constraints 4 to 20 bits per pixel per color plane.

•Coefficients: constraints up to 35 bits per pixel per color plane.

The 2D FIR Filter IP core supports symmetric coefficients—reduces the number of multipliers, resulting in smaller hardware. You can set the Coefficients can be set at compile time, or changed at run time using an Avalon-MM slave interface.

Calculation Precision

The 2D FIR Filter IP core does not lose calculation precision during the FIR calculation.

The calculation and result data types are derived from the range of input values (as specified by the input data type, or input guard bands if provided), the coefficient fixed point type and the coefficient values. If scaling is selected, then the result data type is scaled up appropriately such that precision is not lost.

© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

ISO 9001:2008 Registered

www.altera.com

101 Innovation Drive, San Jose, CA 95134

	5-2	Coefficient Precision	UG-VIPSUITE
			2015.01.23

Coefficient Precision

The 2D FIR Filter IP core requires a fixed point type to be defined for the coefficients.

The user-entered coefficients (shown as white boxes in the parameter editor) are rounded to fit in the chosen coefficient fixed point type (shown as purple boxes in the parameter editor).

Result to Output Data Type Conversion

After calculation, the fixed point type of the results must be converted to the integer data type of the output.

The conversion is performed in four stages, in the following order:

1.Result scaling—scaling is useful to quickly increase the color depth of the output.

•The available options are a shift of the binary point right –16 to +16 places.

•Scaling is implemented as a simple shift operation so it does not require multipliers.

2.Removal of fractional bits—if any fractional bits exist, you can choose to remove them through these methods:

•Truncate to integer—fractional bits are removed from the data; equivalent to rounding towards negative infinity.

•Round - Half up—round up to the nearest integer. If the fractional bits equal 0.5, rounding is towards positive infinity.

•Round - Half even—round to the nearest integer. If the fractional bits equal 0.5, rounding is towards the nearest even integer.

3.Conversion from signed to unsigned— if any negative numbers exist in the results and the output type is unsigned, you can convert to unsigned through these methods:.

•Saturate to the minimum output value (constraining to range).

•Replace negative numbers with their absolute positive value.

4.Constrain to range—if any of the results are beyond a specific range, logic to saturate the results to the minimum and maximum output values is automatically added. The specific range is the specified range of the output guard bands, or if unspecified, the minimum and maximum values allowed by the output bits per pixel.

2D FIR IP Core Parameter Settings

Table 5-1: 2D FIR Parameter Settings

		Parameter		Value		Description
	Maximum image width			32-2600, Default = 640		Specify the maximum image width in pixels.
	Number of color planes in			1, 2, 3		Select the number of color planes that are
	sequence					sent in sequence over one data connection.
						For example, a value of 3 for R'G'B' R'G'B'
						R'G'B'.
Altera Corporation						2D FIR Filter IP Core
						Send Feedback

UG-VIPSUITE						2D FIR IP Core Parameter Settings		5-3
2015.01.23
	Parameter			Value		Description
	Input data type: Bits per pixel		4-20, Default = 8			Select the number of bits per pixel (per color
	per color plane					plane).
						Note: You can specify a higher precision
						output by increasing Bits per pixel
						per color plane and Move binary
						point right.
	Input data type: Data type		•	Unsigned		Select if you want the input to be unsigned or
			•	Signed		signed 2's complement.
	Input data type: Guard bands		On or Off			Turn on to enable a defined input range.
	Input data type: Max		1,048,575 to -524,288,			Set input range maximum value.
			Default = 255			Note: The maximum and minimum
						guard band values specify a range
						in which the input must always
						fall. The 2D FIR filter behaves
						unexpectedly for values outside
						this range.
	Input data type: Min		1,048,575 to -524,288,			Set input range minimum value.
			Default = 0			Note: The maximum and minimum
						guard band values specify a range
						in which the input must always
						fall. The 2D FIR filter behaves
						unexpectedly for values outside
						this range.
	Output data type: Bits per pixel		4–20, Default = 8			Select the number of bits per pixel (per color
	per color plane					plane).
						Note: You can specify a higher precision
						output by increasing Bits per pixel
						per color plane and Move binary
						point right.
	Output data type: Data type		•	Unsigned		Select if you want the output to be unsigned
			•	Signed		or signed 2's complement.
	Output data type: Guard bands		On or Off			Turn on to enable a defined output range.
	Output data type: Max		1,048,575 to -524,288,			Set output range maximum value.
			Default = 255			Note: The output is constrained to fall in
						the specified range of maximum
						and minimum guard band values.
2D FIR Filter IP Core							Altera Corporation
	Send Feedback

5-4		2D FIR Filter Signals					UG-VIPSUITE
						2015.01.23
		Parameter			Value		Description
		Output data type: Min		1,048,575 to -524,288,			Set output range minimum value.
				Default = 0			Note: The output is constrained to fall in
							the specified range of maximum
							and minimum guard band values.
		Move binary point right		-16 to +16, Default = 0			Specify the number of places to move the
							binary point. This can be useful if you require
							a wider range output on an existing
							coefficient set.
							Note: You can specify a higher precision
							output by increasing Bits per pixel
							per color plane and Move binary
							point right.
		Remove fraction bits by		•	Round values - Half		Select the method to discard the fractional
					up		bits resulting from the FIR calculation.
				• Round values - Half
					even
				•	Truncate values to
					integer
		Convert from signed to unsigned		•	Saturating to		Select the method to convert the signed FIR
		by			minimum value at		results to unsigned .
					stage 4
				•	Replacing negative
					with absolute value

2D FIR Filter Signals

Table 5-2: 2D FIR Filter Signals

The table below lists the signals for 2D FIR Filter IP cores.

		Signal		Direction		Description
	reset			Input		The IP core asynchronously resets when you assert this
						signal. You must deassert this signal synchronously to the
						rising edge of the clock signal.
	clock			Input		The main system clock. The IP core operates on the rising
						edge of this signal.
	din_data			Input		din_N port Avalon-ST data bus. This bus enables the
						transfer of pixel data into the IP core.
	din_endofpacket			Input		din_N port Avalon-ST endofpacket signal. This signal
						marks the end of an Avalon-ST packet.
Altera Corporation						2D FIR Filter IP Core
						Send Feedback