- •Contents
- •1. Video and Image Processing Suite Overview
- •Release Information
- •Device Family Support
- •Latency
- •In-System Performance and Resource Guidance
- •Stall Behavior and Error Recovery
- •2. Interfaces
- •Video Formats
- •Avalon-ST Video Protocol
- •Video Data Packets
- •Static Parameters of Video Data Packets
- •Control Data Packets
- •Ancillary Data Packets
- •User-Defined and Altera-Reserved Packets
- •Packet Propagation
- •Transmission of Avalon-ST Video Over Avalon-ST Interfaces
- •Packet Transfer Examples
- •Avalon-MM Slave Interfaces
- •Specification of the Type of Avalon-MM Slave Interfaces
- •Avalon-MM Master Interfaces
- •Specification of the Type of Avalon-MM Master Interfaces
- •Buffering of Non-Image Data Packets in Memory
- •3. Getting Started
- •IP Catalog and Parameter Editor
- •Specifying IP Core Parameters and Options
- •Installing and Licensing IP Cores
- •OpenCore Plus IP Evaluation
- •4. Clocked Video Interface IP Cores
- •Control Port
- •Clocked Video Input Format Detection
- •Interrupts
- •Clocked Video Output Video Modes
- •Interrupts
- •Generator Lock
- •Underflow and Overflow
- •Timing Constraints
- •Handling Ancillary Packets
- •Modules for Clocked Video Input II IP Core
- •Clocked Video Interface Parameter Settings
- •Clocked Video Interface Signals
- •Clocked Video Interface Control Registers
- •5. 2D FIR Filter IP Core
- •Calculation Precision
- •Coefficient Precision
- •Result to Output Data Type Conversion
- •2D FIR IP Core Parameter Settings
- •2D FIR Filter Signals
- •2D FIR Filter Control Registers
- •6. Video Mixing IP Cores
- •Alpha Blending
- •Video Mixing Parameter Settings
- •Video Mixing Signals
- •Video Mixing Control Registers
- •7. Chroma Resampler IP Core
- •Horizontal Resampling (4:2:2)
- •Vertical Resampling (4:2:0)
- •Chroma Resampler Parameter Settings
- •Chroma Resampler Signals
- •8. Video Clipping IP Cores
- •Video Clipping Parameter Settings
- •Video Clipping Signals
- •Video Clipping Control Registers
- •9. Color Plane Sequencer IP Core
- •Combining Color Patterns
- •Rearranging Color Patterns
- •Splitting and Duplicating
- •Subsampled Data
- •Color Plane Sequencer Parameter Settings
- •Color Plane Sequencer Signals
- •10. Color Space Conversion IP Cores
- •Input and Output Data Types
- •Color Space Conversion
- •Result of Output Data Type Conversion
- •Color Space Conversion Parameter Settings
- •Color Space Conversion Signals
- •Color Space Conversion Control Registers
- •11. Control Synchronizer IP Core
- •Using the Control Synchronizer IP Core
- •Control Synchronizer Parameter Settings
- •Control Synchronizer Signals
- •Control Synchronizer Control Registers
- •12. Deinterlacing IP Cores
- •Deinterlacing Methods
- •Bob with Scanline Duplication
- •Bob with Scanline Interpolation
- •Weave
- •Motion-Adaptive
- •Sobel-Based HQ Mode
- •Pass-Through Mode for Progressive Frames
- •Frame Buffering
- •Frame Rate Conversion
- •Bandwidth Requirement Calculations for 10-bit YCbCr Video
- •Behavior When Unexpected Fields are Received
- •Handling of Avalon-ST Video Control Packets
- •Deinterlacing Parameter Settings
- •Deinterlacing Signals
- •Deinterlacing Control Registers
- •Design Guidelines for Broadcast Deinterlacer IP Core
- •13. Frame Reader IP Core
- •Single-Cycle Color Patterns
- •Frame Reader Output Pattern and Memory Organization
- •Frame Reader Parameter Settings
- •Frame Reader Signals
- •Frame Reader Control Registers
- •14. Frame Buffer IP Cores
- •Double Buffering
- •Triple Buffering
- •Locked Frame Rate Conversion
- •Handling of Avalon-ST Video Control Packets
- •Color Format
- •Frame Buffer Parameter Settings
- •Frame Buffer Signals
- •Frame Buffer Control Registers
- •15. Gamma Corrector IP Core
- •Gamma Corrector Parameter Settings
- •Gamma Corrector Signals
- •Gamma Corrector Control Registers
- •16. Interlacer IP Core
- •Interlacer Parameter Settings
- •Interlacer Signals
- •Interlacer Control Registers
- •17. Scaler II IP Core
- •Nearest Neighbor Algorithm
- •Bilinear Algorithm
- •Bilinear Algorithmic Description
- •Polyphase and Bicubic Algorithm
- •Double-Buffering
- •Polyphase Algorithmic Description
- •Choosing and Loading Coefficients
- •Edge-Adaptive Scaling Algorithm
- •Scaler II Parameter Settings
- •Scaler II Signals
- •Scaler II Control Registers
- •18. Video Switching IP Cores
- •Mixer Layer Switching
- •Video Switching Parameter Settings
- •Video Switching Signals
- •Video Switching Control Registers
- •19. Test Pattern Generator IP Cores
- •Test Pattern
- •Generation of Avalon-ST Video Control Packets and Run-Time Control
- •Test Pattern Generator Parameter Settings
- •Test Pattern Generator Signals
- •Test Pattern Generator Control Registers
- •20. Trace System IP Core
- •Trace System Parameter Settings
- •Trace System Signals
- •Operating the Trace System from System Console
- •Loading the Project and Connecting to the Hardware
- •Trace Within System Console
- •TCL Shell Commands
- •21. Avalon-ST Video Monitor IP Core
- •Packet Visualization
- •Monitor Settings
- •Avalon-ST Video Monitor Parameter Settings
- •Avalon-ST Video Monitor Signals
- •Avalon-ST Video Monitor Control Registers
- •Avalon-ST Video Class Library
- •Running the Tests
- •Video File Reader Test
- •Example Test Environment
- •Video Field Life Cycle
- •Constrained Random Test
- •Complete Class Reference
- •c_av_st_video_control
- •c_av_st_video_data
- •c_av_st_video_file_io
- •c_av_st_video_item
- •c_av_st_video_source_sink_base
- •c_av_st_video_sink_bfm_’SINK
- •c_av_st_video_source_bfm_’SOURCE
- •c_av_st_video_user_packet
- •c_pixel
- •Raw Video Data Format
- •Cadence Detection and Reverse Pulldown in the Deinterlacer II IP Core
- •Document Revision History
- •How to Contact Altera
Color Plane Sequencer IP Core |
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2015.01.23
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The Color Plane Sequencer IP core changes how color plane samples are transmitted across the AvalonST interface.
You can configure the channel order in sequence or in parallel. The Color Plane Sequencer IP core rearranges the color pattern used to transmit Avalon-ST Video data packets over an Avalon-ST connection (stream). The Color Plane Sequencer can also split or duplicate a single Avalon-ST Video stream into two or, conversely, combine two input streams into a single stream.
A color pattern is a matrix that defines a repeating pattern of color samples
Combining Color Patterns
The Color Plane Sequencer IP core combines two Avalon-ST Video streams into a single stream.
In this mode of operation, the IP core combines two input color patterns (one for each input stream) and arranges to the output stream color pattern in a user-defined way, as long as it contains a valid combina tion of channels in sequence and parallel.
In addition to this combination and arrangement, color planes can also be dropped. Avalon-ST Video packets other than video data packets can be forwarded to the single output stream with the following options:
•Packets from input stream 0 (port din0) and input stream 1 (port din1) forwarded, input stream 0 packets being transmitted last. (The last control packet received is the one an Avalon-ST Video compliant IP core uses.)
•Packets from input stream 0 forwarded, packets from input stream 1 dropped.
•Packets from input stream 1 forwarded, packets from input stream 0 dropped.
© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
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9-2 |
Rearranging Color Patterns |
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Figure 9-1: Example of Combining Color Patterns
The figure shows an example of combining and rearranging two color patterns.
R G B
Color pattern of a video data packet on input stream 0
3 color plane samples in sequence
X
Y
Z
Color pattern of a video data packet on input stream 1
3 color plane samples in parallel
R X
Y G
Color pattern of a video data packet on the output stream
2 color plane samples in parallel and sequence
Z B
Planes unused between the input and output are dropped
Rearranging Color Patterns
The Color Plane Sequencer IP core can rearrange the color pattern of a video packet and drop color planes.
The Color Plane Sequencer IP core rearranges the color pattern of a video data packet in any valid combination of channels in sequence and parallel. The IP core also drops color planes. Avalon-ST Video packets of types other than video data packets are forwarded unchanged.
Figure 9-2: Example of Rearranging Color Patterns
The figure shows an example that rearranges the color pattern of a video data packet which transmits color planes in sequence to transmit color planes in parallel.
R G B
Color pattern of a video data packet on the input stream
3 color plane samples in sequence
R
G
B
Color pattern of a video data packet on the output stream
3 color plane samples in parallel
Note: When the color pattern of a video data packet changes from the input to the output side of a block, the Color Plane Sequencer IP core adds padding to the end of non-video data packets with extra
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Splitting and Duplicating |
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data. Altera recommends that when you define a packet type where the length is variable and meaningful, you send the length at the start of the packet.
Splitting and Duplicating
The Color Plane Sequencer IP core splits a single Avalon-ST Video input stream into two Avalon-ST Video output streams..
In this mode of operation, the IP core arranges the color patterns of video data packets on the output streams in a user-defined way using any of the color planes of the input color pattern.
The color planes of the input color pattern are available for use on either, both, or neither of the outputs. This allows for splitting of video data packets, duplication of video data packets, or a mix of splitting and duplication. The output color patterns are independent of each other, so the arrangement of one output stream's color pattern places no limitation on the arrangement of the other output stream's color pattern.
The Color Plane Sequencer IP core duplicates Avalon-ST Video packets, other than video data packets, to both outputs.
Figure 9-3: Example of Splitting and Duplicating Color Patterns
The figure shows an example of partially splitting and duplicating an input color pattern.
R G B
Color pattern of a video data packet on input stream 0
3 color plane samples in sequence
X
Y
Z
Color pattern of a video data packet on input stream 1
3 color plane samples in parallel
R X
Y G
Color pattern of a video data packet on the output stream
2 color plane samples in parallel and sequence
Z B
Planes unused between the input and output are dropped
Caution: A deadlock may happen when the sequencer splits, processes independently and then joins back the color planes, or when the sequencer splits the color planes in front of another Video Image Processing IP core. To avoid this issue, add small FIFO buffers at the output of the Color Plane Sequencer IP core that are configured as splitters.
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Subsampled Data |
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Subsampled Data
In addition to fully sampled color patterns, the Color Plane Sequencer IP core also supports 4:2:2 subsampled data.
For the Color Plane Sequencer IP core to support 4:2:2 subsampled data, you can configure the IP core with two color patterns in sequence, so that subsampled planes can be specified individually.
When splitting subsampled planes from fully-sampled planes, the Avalon-ST Video control packet for the subsampled video data packet can have its width value halved, so that the subsampled planes can be processed by other IP cores as if fully sampled. This halving can be applied to control packets on port dout0 and port dout1, or control packets on port dout0 only.
Color Plane Sequencer Parameter Settings
Table 9-1: Color Plane Sequencer Parameter Settings
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Bits per pixel per color plane |
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4-20, Default = 8 |
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Select the number of bits per pixel (per color |
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plane). |
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Two pixels per port |
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On or Off |
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Turn on to enable two pixels on each port. |
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• Turn on this parameter if you want to |
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treat Cb and Cr separately because it |
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requires two pixels worth of data. |
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• Alternatively, you can turn off this |
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parameter and use channel names C, Y |
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instead of Cb, Y, Cr, Y. |
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din0: Color planes in sequence |
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1, 2, 3, 4 |
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Select the number of color planes in sequence |
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for input port din0. |
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din0: Color planes in parallel |
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1, 2, 3, 4 |
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Select the number of color planes in parallel |
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for input port din0. |
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din1: Port enabled |
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On or Off |
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din1: Color planes in sequence |
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1, 2, 3, 4 |
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for input port din1. |
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din1: Color planes in parallel |
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1, 2, 3, 4 |
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for input port din1. |
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dout0: Non-image packet source |
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din 0 |
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Select the source port(s) that are enabled for |
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din 1 |
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non-image packets for output port dout0. |
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• din 0 and din 1 |
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dout0: Color planes in sequence |
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1, 2, 3, 4 |
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for input port dout0. |
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Color Plane Sequencer IP Core |
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Color Plane Sequencer Parameter Settings |
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Parameter |
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dout0: Color planes in parallel |
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1, 2, 3, 4 |
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Select the number of color planes in parallel |
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for input port dout0. |
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dout0: Halve control packet |
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On or Off |
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Turn on to halve the Avalon-ST Video |
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width |
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control packet width for output port dout0. |
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Turn on this parameter when stream contains |
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two subsampled channels. |
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Note: For other IP cores to be able to |
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treat these channels as two fully |
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sampled channels in sequence, the |
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control packet width must be |
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halved. |
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This option can be useful if you want to split |
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a subsampled color plane from a fully |
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sampled color plane. The subsampled color |
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plane can then be processed by other |
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functions as if fully sampled. |
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dout1: Port enabled |
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On or Off |
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Turn on to enable input port dout1. |
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dout1: Non-image packet source |
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din 0 |
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Select the source port(s) that are enabled for |
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din 1 |
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non-image packets for output port dout1. |
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• din 0 and din 1 |
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dout1: Color planes in sequence |
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1, 2, 3, 4 |
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for input port dout1. |
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dout1: Color planes in parallel |
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1, 2, 3, 4 |
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Select the number of color planes in parallel |
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for input port dout1. |
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dout1: Halve control packet |
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On or Off |
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Turn on to halve the Avalon-ST Video |
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width |
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control packet width for output port dout1. |
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This option can be useful if you want to split |
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a subsampled color plane from a fully |
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sampled color plane. The subsampled color |
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plane can then be processed by other |
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functions as if fully sampled. |
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Color Plane Sequencer IP Core |
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