8XC196EA USER’S MANUAL

4.2.2Internal ROM

The 83C196EA has 8 Kbytes of internal ROM located at FF2000–FF3FFFH. The upper 7-Kbyte section (FF2400–FF3FFFH) is used for storing your application code and data. This 7-Kbyte partition can be identically mapped into page 00H (002400–003FFFH).

The lower 1-Kbyte section (FF2000–FF23FFH) is used for storing boot code, chip configuration bytes (CCBs), interrupt vectors, peripheral interrupt handler (PIH) vectors, and peripheral transaction server (PTS) vectors. This 1-Kbyte partition cannot be mapped into page 00H.

During application development, you may need to use an external memory device to store code and data that will later reside in the internal ROM. To do so, hold the EA# pin low during reset, forcing all accesses to FF2000–FF3FFFH to the external memory device.

To optimize your application, you may want to make the data in FF2400–FF3FFFH accessible as near data in page 00H. To accomplish this, set the REMAP bit (CCB1.2) when you program the CCBs, and hold EA# high during reset. This combination forces all accesses to FF2000– FF3FFFH to the internal ROM and “shadows” the contents of FF2400–FF3FFFH into page 00H.

Mapping the ROM contents into both pages 00H and FFH allows you to access data and constants as near data and near constants in page 00H and execute code in page FFH.

NOTE

The EA# input is effective only for accesses to the internal ROM (FF2000– FF3FFFH). For accesses to any other location, the state of EA# is irrelevant. The REMAP bit is effective only for accesses to FF2400–FF3FFFH and only when EA# is inactive. When EA# is active, execution is external and the REMAP bit is ignored. The REMAP bit is loaded from the CCB and the state of EA# is latched upon leaving reset; neither can be changed until the next reset.

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MEMORY PARTITIONS

4.2.2.1Program Memory in Page FFH

The address space in page FFH is implemented by a combination of internal ROM, internal code RAM, and external memory devices. Nearly all of page FFH is available for storing executable code. A 1-Kbyte section (FF0000–FF03FFH) is reserved for in-circuit emulators, and 256 bytes (FF2000–FF207FH and FF20C0–FF23FFH) are used for special-purpose memory (chip configuration bytes and interrupt vectors). The 3-Kbyte partition FF0400–FF0FFFH is occupied by an identical copy of the internal code RAM from page 00H. Mapping the internal code RAM into both pages allows you to access data and constants as near data and near constants in page 00H and execute code in page FFH. The remainder of page FFH is available for storing code.

NOTE

We recommend that you write FFH (the opcode for the RST instruction) to unused program memory locations. This causes a reset if a program begins to execute in unused memory.

4.2.2.2Special-purpose Memory in Page FFH

Special-purpose memory resides in locations FF2000–FF207FH and FF20C0–FF21FFH (Table 4-2). It contains several reserved memory locations, the chip configuration bytes (CCBs), and vectors for peripheral transaction server (PTS), peripheral interrupt handler (PIH), and standard interrupts.

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8XC196EA USER’S MANUAL

Table 4-2. 8XC196EA Special-purpose Memory Addresses

	Hex Address	Description
	FF213F	PIH 1 vectors †
	FF2100
	FF20FF	PIH 0 vectors †
	FF20C0
	FF20BF	Program memory †
	FF2080
	FF207F	Reserved (each byte must contain FFH)
	FF205E
	FF205D	PTS vectors
	FF2040
	FF203F	Upper interrupt vectors
	FF2030
	FF202F	Security key
	FF2020
	FF2019	Reserved (each byte must contain FFH)
	FF201C
	FF201B	Reserved (must contain 20H)
	FF201A	CCB1
	FF2019	Reserved (must contain 20H)
	FF2018	CCB0
	FF2017	PIH dummy PTS vector (point to ZERO_REG; 0000H)
	FF2016
	FF2015	PIH dummy interrupt vector (point to a RET instruction)
	FF2014
	FF2013	Reserved (each byte must contain FFH)
	FF2010
	FF200F	Lower interrupt vectors
	FF2000

†The PIH interrupt vectors are located above the program startup address (FF2080H). Your code must branch around the vector table (FF20C0–FF213FH). The jump instruction must occur before address FF20C0H and branch to or past address FF2140H.

4.2.2.3Reserved Memory Locations

Several memory locations are reserved for testing or for use in future products. Do not read or write these locations except to initialize them to the values shown in Table 4-2. The function or contents of these locations may change in future revisions; software that uses reserved locations may not function properly.

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