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8xC196EA microcontroller user's manual.1998.pdf
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STACK OVERFLOW MODULE

5.4PROGRAMMING THE STACK OVERFLOW MODULE

To use the stack overflow module, you must initialize the stack pointer and specify the stack boundaries. The stack overflow interrupt is nonmaskable, so you do not need to enable the interrupt in the INT_MASK1 register or enable interrupt servicing by executing the EI instruction.

5.4.1Initializing the Stack Pointer

Initialize the stack pointer (Figure 5-2) to an address that is two bytes (in 64-Kbyte mode) or four bytes (in 2-Mbyte mode) greater than the desired starting address (top) of the stack. Ensure that this value is within the boundaries you specify in STACK_BOTTOM and STACK_TOP.

SP

Address:

18H

 

Reset State:

XXXXH

The system’s stack pointer (SP) can point anywhere in page 00H; it must be word aligned and must always be initialized before use. The stack pointer is decremented before a PUSH and incremented after a POP, so you should initialize the stack pointer to two bytes (in 64-Kbyte mode) or four bytes (in 2-Mbyte mode) above the highest stack location. If stack operations are not being performed, locations 18H and 19H may be used as standard registers.

15

0

Stack Pointer

 

Bit

Function

 

 

Number

 

 

 

 

 

 

 

 

 

15:0

Stack Pointer

 

 

 

This register makes up the system’s stack pointer.

 

 

 

 

 

 

 

 

 

 

 

Figure 5-2. Stack Pointer (SP)

 

5.4.2Enabling the Stack Overflow Module and Specifying Stack Boundaries

Two registers, STACK_BOTTOM and STACK_TOP, control the stack overflow detection circuitry. Write to STACK_BOTTOM (Figure 5-3) to establish the lower boundary for the stack, then write to STACK_TOP (Figure 5-4) to establish the upper boundary and to enable the overflow detection circuitry.

If an overflow occurs, the stack overflow module sets the stack overflow interrupt pending bit in INT_PEND1. Your interrupt service routine must write to the STACK_TOP register to re-enable the overflow detection circuitry. Otherwise, the R/S flip-flop (Figure 5-1 on page 5-1) remains set, and the stack overflow module is unable to signal another overflow.

5-3

8XC196EA USER’S MANUAL

 

STACK_BOTTOM

Address:

1FA0H

 

 

 

 

Reset State:

0000H

 

 

The value you write to this register specifies the lower address limit for the stack. The overflow

 

 

 

detection circuitry compares the stack pointer (SP) value on the peripheral address bus to the

 

 

 

STACK_TOP and STACK_BOTTOM values.

 

 

 

 

15

 

 

8

 

 

 

 

 

 

 

 

 

Lower Stack Limit (high byte)

 

 

 

 

7

 

 

0

 

 

 

 

 

 

 

 

 

Lower Stack Limit (low byte)

 

 

 

 

 

 

 

 

 

 

Bit

Function

 

 

 

 

Number

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15:0

Lower Stack Limit

 

 

 

 

 

This register specifies the lower address limit for the stack. If the stack pointer value is

 

 

 

equal to or less than this value, the stack overflow module sets the nonmaskable stack

 

 

 

error interrupt (INT14) pending bit in INT_PEND1.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 5-3. Lower Stack Limit (STACK_BOTTOM) Register

 

 

 

 

 

 

 

 

STACK_TOP

Address:

1FA2H

 

 

 

 

Reset State:

FFFFH

 

The value you write to this register specifies the upper address limit for the stack. You must write to this register to enable the stack overflow module. The overflow detection circuitry compares the stack pointer (SP) value on the peripheral address bus to the STACK_TOP and STACK_BOTTOM values.

 

15

8

 

 

 

Upper Stack Limit (high byte)

 

 

7

0

 

 

 

 

 

 

 

Upper Stack Limit (low byte)

 

 

 

 

 

 

Bit

Function

 

 

Number

 

 

 

 

 

 

 

 

 

15:0

Upper Stack Limit

 

 

 

This register specifies the upper address limit for the stack. If the stack pointer value is

 

 

 

equal to or greater than this value, the stack overflow module sets the nonmaskable stack

 

 

 

error interrupt (INT14) pending bit in INT_PEND1.

 

 

 

 

 

 

 

 

 

 

 

Figure 5-4. Upper Stack Limit (STACK_TOP) Register

 

5-4

6

Standard and PTS

Interrupts

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