8XC196EA USER’S MANUAL

TABLES

Table		Page
1-1	Handbooks and Product Information ............................................................................	1-7
1-2	Application Notes .........................................................................................................	1-7
1-3	MCS®96 Microcontroller Datasheets (Automotive) .....................................................	1-8
1-4	Intel Application Support Services................................................................................	1-8
2-1	Features of the 83C196EA ...........................................................................................	2-2
2-2	Features of the 80C196EA ...........................................................................................	2-2
2-3	State Times at Various Frequencies ..........................................................................	2-10
2-4	Relationships Between Input Frequency, Clock Multiplier, and State Times .............	2-11
2-5	Controlling the CLKOUT Output Frequency ...............................................................	2-13
3-1	Data Type Definitions ...................................................................................................	3-1
3-2	Equivalent Data Types for Assembly and C Programming Languages........................	3-2
3-3	Converting Data Types.................................................................................................	3-4
3-4	Definition of Temporary Registers ................................................................................	3-7
4-1	8XC196EA Memory Map..............................................................................................	4-4
4-2	8XC196EA Special-purpose Memory Addresses.........................................................	4-8
4-3	Memory-mapped SFRs ..............................................................................................	4-11
4-4	8XC196EA Peripheral SFRs .....................................................................................	4-12
4-5	Register File Memory Addresses ...............................................................................	4-15
4-6	CPU SFRs ..................................................................................................................	4-17
4-7	Selecting a Window of Peripheral SFRs.....................................................................	4-20
4-8	Selecting a Window of the Upper Register File ..........................................................	4-21
4-9	Windowed Base Addresses .......................................................................................	4-22
5-1	Effect of Subroutine Execution on the Stack, SP, and PC ...........................................	5-2
5-2	Stack Overflow Module Control and Status Registers..................................................	5-2
6-1	Interrupt Signals ...........................................................................................................	6-4
6-2	Interrupt and PTS Control and Status Registers ..........................................................	6-4
6-3	Interrupt Sources, Vectors, and Priorities.....................................................................	6-6
6-4	PIH0 Interrupt Sources, Vectors, and Priorities ..........................................................	6-7
6-5	PIH1 Interrupt Sources, Vectors, and Priorities ..........................................................	6-8
6-6	Execution Times for PTS Cycles ................................................................................	6-18
6-7	Programming the Interrupts........................................................................................	6-19
6-8	Single Transfer Mode PTSCB ....................................................................................	6-38
6-9	Block Transfer Mode PTSCB .....................................................................................	6-38
6-10	Missed-event Mode PTSCBs .....................................................................................	6-43
7-1	Microcontroller I/O Ports ..............................................................................................	7-2
7-2	Microcontroller Port Signals..........................................................................................	7-3
7-3	Port Control and Status Registers ................................................................................	7-5
7-4	Control Register Values for Each Configuration...........................................................	7-8
7-5	Port 7 Configuration Example ....................................................................................	7-10
7-6	Port 7 Pin States After Reset and After Example Code Execution.............................	7-10
7-7	Address and Data Signals..........................................................................................	7-11
7-8	Bus-control Signals ....................................................................................................	7-13
7-9	Chip-select Signals.....................................................................................................	7-16
7-10	EPA and Timer Signals ..............................................................................................	7-17

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	TABLES
Table		Page
7-11	External Interrupt Signal .............................................................................................	7-18
7-12	PWM Signals ..............................................................................................................	7-19
7-13	SIO Signals ................................................................................................................	7-20
7-14	Special Operating Mode Signal ..................................................................................	7-20
7-15	SSIO Signals ..............................................................................................................	7-21
8-1	Serial Port Signals ........................................................................................................	8-4
8-2	Serial Port Control and Status Registers......................................................................	8-4
8-3	Port Register Settings for the SIO Signals .................................................................	8-10
8-4	SPx_BAUD Values When Using the Internal Clock at 40 MHz ..................................	8-15
9-1	SSIO Port Signals ........................................................................................................	9-5
9-2	SSIO Port Registers .....................................................................................................	9-6
9-3	Port Register Settings for the SSIO Signals ...............................................................	9-12
9-4	Common SSIO_BAUD Values at 40 MHz Operating Frequency ...............................	9-14
10-1	PWM Signals ..............................................................................................................	10-2
10-2	PWM Control and Status Registers............................................................................	10-3
10-3	PWM Output Frequencies (FPWM) ...............................................................................	10-6
10-4	PWM Output Alternate Functions ...............................................................................	10-9
11-1	EPA and Timer/Counter Signals.................................................................................	11-2
11-2	EPA Control and Status Registers .............................................................................	11-4
11-3	Action Taken When a Valid Edge Occurs ................................................................	11-12
12-1	A/D Converter Signals ................................................................................................	12-2
12-2	A/D Control and Status Registers...............................................................................	12-2
13-1	Minimum Required Signals.........................................................................................	13-1
13-2	Selecting the Watchdog Reset Interval ....................................................................	13-12
14-1	Operating Mode Control Signals ................................................................................	14-1
14-2	Operating Mode Control and Status Registers .........................................................	14-3
15-1	Example of Internal and External Addresses .............................................................	15-1
15-2	Bus-control Signals ....................................................................................................	15-2
15-3	External Memory Interface Registers .........................................................................	15-7
15-4	Base Addresses for Several Sizes of the Address Range .......................................	15-12
15-5	BUSCONx Registers for the Example System .........................................................	15-15
15-6	Results for the Chip-select Example ........................................................................	15-16
15-7	READY Signal Timing Definitions.............................................................................	15-32
15-8	HOLD#, HLDA# Timing Definitions ..........................................................................	15-34
15-9	Maximum Hold Latency ............................................................................................	15-35
15-10	Write Signals for Standard and Write Strobe Modes................................................	15-37
15-11	AC Timing Symbol Definitions ..................................................................................	15-43
15-12	External Memory Systems Must Meet These Specifications....................................	15-43
15-13	The Microcontroller Meets These Specifications......................................................	15-44
16-1	SDU Signals ...............................................................................................................	16-2
16-2	SDU Control Register .................................................................................................	16-2
16-3	Code RAM Access Instructions ...............................................................................	16-10
17-1	Signal Descriptions.....................................................................................................	17-1
17-2	Control and Status Register ......................................................................................	17-2

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8XC196EA USER’S MANUAL

TABLES

Table		Page
17-3	ROM-dump Memory Map ...........................................................................................	17-7
17-4	Serial Port Mode Memory Map.................................................................................	17-10
17-5	Before RISM Command Execution...........................................................................	17-12
17-6	After RISM Command Execution..............................................................................	17-13
17-7	RISM Commands .....................................................................................................	17-15
17-8	User Program Register and Register RAM Location................................................	17-16
A-1	Opcode Map (Left Half) ...............................................................................................	A-2
A-1	Opcode Map (Right Half) ............................................................................................	A-3
A-2	Processor Status Word (PSW) Flags ..........................................................................	A-4
A-3	Effect of PSW Flags or Specified Conditions on Conditional Jump Instructions .........	A-5
A-4	PSW Flag Setting Symbols .........................................................................................	A-5
A-5	Operand Variables ......................................................................................................	A-6
A-6	Instruction Set .............................................................................................................	A-7
A-7	Instruction Opcodes ..................................................................................................	A-45
A-8	Number of Bytes for Each Instruction and Hexadecimal Opcodes ...........................	A-51
A-9	Instruction Execution Times (in State Times) ...........................................................	A-57
A-10	Jump Penalty (in State Times) ..................................................................................	A-65
B-1	8XC196EA Signals Arranged by Functions.................................................................	B-2
B-2	Description of Columns of Table B-3...........................................................................	B-5
B-3	Signal Descriptions......................................................................................................	B-5
B-4	Definition of Status Symbols .....................................................................................	B-15
B-5	8XC196EA Default Signal Conditions .....................................................................	B-15
C-1	Modules and Related Registers ................................................................................	C-1
C-2	Register Name, Address, and Reset Value ...............................................................	C-2
C-3	AD_RESULTx Addresses and Reset States .............................................................	C-12
C-4	ADDRCOMx Addresses and Reset States................................................................	C-16
C-5	ADDRMSKx Addresses and Reset States ................................................................	C-17
C-6	BUSCONx Addresses and Reset States...................................................................	C-18
C-7	EPAx_CON Addresses and Reset States .................................................................	C-31
C-8	EPAx_TIME Addresses and Reset States ................................................................	C-32
C-9	OSx_CON Addresses and Reset Values ..................................................................	C-41
C-10	OSx_TIME Addresses and Reset Values..................................................................	C-42
C-11	Px_DIR Addresses and Reset States........................................................................	C-43
C-12	Px_MODE Addresses and Reset States...................................................................	C-44
C-13	Special-function Signals for Ports 2, 5, 7–12.............................................................	C-45
C-14	Px_PIN Addresses and Reset States........................................................................	C-46
C-15	Px_REG Addresses and Reset States ......................................................................	C-48
C-16	PWMx_y_COUNT Addresses and Reset States.......................................................	C-64
C-17	PWMx_y_PERIOD Addresses and Reset States......................................................	C-65
C-18	PWMx_CONTROL and PWMy_CONTROL Addresses and Reset States................	C-65
C-19	Common SSIO_BAUD Values at 40 MHz Operating Frequency ..............................	C-74
C-20	TxCONTROL Addresses ..........................................................................................	C-84
C-21	TIMERx Addresses and Reset States ......................................................................	C-85

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