CHAPTER 5

STACK OVERFLOW MODULE

The stack overflow module monitors the value of the stack pointer (SP) and generates a nonmaskable interrupt request if the value is outside the boundaries you specify. This module helps to ensure data integrity. Without the stack overflow module, the stack could grow too large and corrupt other data, causing a fatal system error.

5.1FUNCTIONAL OVERVIEW

The stack overflow module (Figure 5-1) decodes the stack pointer addresses (0018–0019H) from the peripheral address bus. The comparator compares that value to the boundaries you specify. A stack pointer value that is equal to or outside the boundaries sets the R/S flip-flop, which in turn sets the nonmaskable interrupt pending bit.

The R/S flip-flop can be set only once, and only a reset or another write operation to the STACK_TOP register can clear it. Your initialization code and your interrupt service routine for the stack overflow error must write to the STACK_TOP register to enable the stack overflow module.

	Bus	Comparator
		SP ³ STACK_TOP		Set INT_PEND1.6
	Address
		STACK_TOP
		Stack Pointer (SP)	S	Q
	Peripheral	0018–0019H
		SP £ STACK_BOTTOM	R Q#
		STACK_BOTTOM
		Reset
		Write to STACK_TOP
			One-shot
			pulse generator
				A3313-01

Figure 5-1. Stack Overflow Module Block Diagram

5.2STACK OPERATIONS

The stack is a last-in-first-out (LIFO) register used to keep track of program addresses and the processor status word (PSW), as well as to pass parameters from one routine to another. You control the location of the stack by initializing the stack pointer (SP) with an address that is two bytes (for 64-Kbyte mode) or four bytes (for 2-Mbyte mode) greater than the starting address (top) of the stack. The stack grows downward as entries are added (PUSHed onto the stack) and shrinks upward as entries are unloaded (POPped off the stack). The stack must be located in page 00H, and is most efficient when located in the upper register file.

5-1

8XC196EA USER’S MANUAL

When the CPU encounters a subroutine call or interrupt service routine, it manipulates the stack pointer (SP), the stack, and the program counter (PC) as shown in Table 5-1.

Table 5-1. Effect of Subroutine Execution on the Stack, SP, and PC

Instruction	Operation
BR, CALL, JUMP	SP ← (SP–2) in 64-Kbyte mode or (SP–4) in 2-Mbyte mode)
	Stack ← PC (next instruction address)
	PC ← address of subroutine or interrupt service routine

…Execute subroutine or interrupt service routine

RET	PC ← next instruction address (from top of stack)
	SP ← (SP+2) in 64-Kbyte mode or (SP+4) in 2-Mbyte mode)

5.3STACK OVERFLOW MODULE REGISTERS

Table 5-2 describes the registers associated with the stack overflow module.

Table 5-2. Stack Overflow Module Control and Status Registers

Mnemonic	Address	Description
INT_MASK1	0013H	Interrupt Mask 1
		The stack overflow interrupt is always enabled. The nonfunctional
		STACK mask bit in INT_MASK1 exists for design symmetry with the
		INT_PEND1 register. Write zero to the STACK bit or leave it in its
		default state.
INT_PEND1	0012H	Interrupt Pending 1
		The STACK bit in this register, when set, indicates that a stack
		overflow interrupt is pending.
SP	0018H	Stack Pointer
		Initialize the stack pointer to an address that is two bytes (in 64-Kbyte
		mode) or four bytes (in 2-Mbyte mode) greater than the desired
		starting address (top) of the stack. Ensure that this value is within the
		boundaries you specify in STACK_BOTTOM and STACK_TOP.
STACK_BOTTOM	1FA0H	Lower Stack Limit
		Write the boundary address for the bottom of the stack to this
		register. A stack pointer value that is equal to or less than this
		address will set the stack overflow interrupt pending bit in
		INT_PEND1.
STACK_TOP	1FA2H	Upper Stack Limit
		You must write to this register to enable the stack overflow module
		after a reset and after a stack overflow. Write the boundary address
		for the top of the stack to this register. A stack pointer value that is
		equal to or greater than this address will set the stack overflow
		interrupt pending bit in INT_PEND1.

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